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LTC3589 датащи(PDF) 19 Page - Linear Technology |
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LTC3589 датащи(HTML) 19 Page - Linear Technology |
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19 / 50 page ![]() LTC3589/LTC3589-1/ LTC3589-2 19 3589fe Table 2. Shows the I2C command register settings used to control LDO2. Table 2. LDO 2 Command Register Settings COMMAND REGISTER[BIT] VALUE SETTING OVEN[4] 0* 1 Disable Enable SCR2[4] LTC3589/LTC3589-1 0* 1 Wait for Output Below 300mV Before Enable Enable Immediately SCR2[4] LTC3589-2 0* 1 Enable Immediately Wait for Output Below 300mV Before Enable VCCR[5] 0* 1 Select Register L2DTV1 (V1) Reference Select Register L2DTV2 (V2) Reference VCCR[6] 1 Initiate Dynamic Voltage Slew VRRCR[7-6] 00 01 10 11* Reference Slew Rate = 0.88mV/μs Reference Slew Rate = 1.75mV/μs Reference Slew Rate = 3.5mV/μs Reference Slew Rate = 7mV/μs L2DTV1[4-0] 11001* DAC Dynamic Target Voltage V1 L2DTV1[5] 0* 1 Force PGOOD Low When Slewing Normal PGOOD Operation When Slewing L2DTV1[7] 0* 1 Shutdown LDO2 Normally Keep LDO2 Alive L2DTV2[4-0] 11001* DAC Dynamic Target Voltage V2 * Denotes Default Power-On Value LDO Regulator 3 LDO3 is a fixed 1.8V or 2.8V (LTC3589-1/LTC3589-2) output regulator. LDO3 is enabled by driving pin EN_LDO34 or EN_LD03 high or by writing command register OVEN[5] to 1. Table 3 shows the I2C command register settings used to control LDO3. Table 3. LDO 3 Command Register Settings COMMAND REGISTER[BIT] VALUE SETTING OVEN[5] 0* 1 Disable Enable SCR2[5] LTC3589/LTC3589-1 0* 1 Wait for Output Below 300mV Before Enable Enable Immediately SCR2[5] LTC3589-2 0* 1 Enable Immediately Wait for Output Below 300mV Before Enable * Denotes Default Power-On Value OPERATION LDO Regulator 4 LDO4 has four output voltage options that are controlled by the contents of command register bits L2DTV2[6] and L2DTV2[5]. When pin EN_LDO34 is low, LDO3 and LDO4 are controlled by writing to command register bits OVEN[5] and OVEN[6] respectively. By default, the LTC3589 pin EN_LDO34 enables and disables LDO3 and LDO4 simultaneously when command register bits OVEN[5] and OVEN[6] are low. When command register bit L2DTV2[7] is high, control of LDO4 is disconnected from pin EN_LDO34 and controlled by command register bit OVEN[6] regardless of the status of EN_LDO34. The LTC3589-1/LTC3589-2 pin EN_LDO3 enables only LDO3. Control of LDO4 on the LTC3589-1/LTC3589-2 is under I2C control only. Table 4 shows the I2C command register settings that control LDO4. Table 4. LTC3589 LDO4 Command Register Settings COMMAND REGISTER[BIT] VALUE SETTING OVEN[6] 0* 1 Disable Enable SCR2[6] 0* 1 Wait for Output Below 300mV Before Enable Enable Immediately L2DTV2[6-5] 00* 01 10 11 VLDO4 = 2.8V VLDO4 = 2.5V VLDO4 = 1.8V VLDO4 = 3.3V L2DTV2[7] 0* 1 LDO4 Enable Controlled by EN_LDO34 LDO4 Enable Controlled by OVEN[6] LTC3589-1/LTC3589-2 LDO4 Command Register Settings OVEN[6] 0* 1 Disable Enable SCR2[6] LTC3589-1 0* 1 Wait for Output Below 300mV Before Enable Enable Immediately SCR2[6] LTC3589-2 0* 1 Enable Immediately Wait for Output Below 300mV Before Enable L2DTV2[6-5] 00* 01 10 11 VLDO4 = 1.2V VLDO4 = 1.8V VLDO4 = 2.5V VLDO4 = 3.2V L2DTV2[7] 0* 1 Unused * Denotes Default Power-On Value |
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