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LTC3589 датащи(PDF) 17 Page - Linear Technology |
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LTC3589 датащи(HTML) 17 Page - Linear Technology |
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17 / 50 page ![]() LTC3589/LTC3589-1/ LTC3589-2 17 3589fe The LTC3589 has flexible options for enabling and sequenc- ing the regulator enables. The regulators are enabled us- ing input pins or the I2C serial port. To define a power-on sequence tie the enable of the first regulator to be powered up to the WAKE pin. Connect the first regulators output to the enable pin of the second regulator, and so on. One or more regulators may be started in any sequence. Each enable pin has a 200μs (typical) delay between the pin and the internal enable of the regulator. When the system controllers are satisfied that power rails are up, the con- troller must drive PWR_ON HIGH to keep WAKE active. To ensure correct start-up sequencing, the regulators outputs are monitored by voltage comparators which require each output to discharge below 300mV before re-enabling. A software control command register function is available which sets the regulators to effectively ignore their enable pins but respond to I2C register enables. This function enables software-only control of any combination of pin- strapped regulators and is useful for implementing system power saving modes. Keep-alive mode exempts selected regulators from turning off during normal shutdown. In keep-alive mode, the LTC3589 powers down normally and is ready for the next start-up sequence, but selected regulators are kept on to power memory or other functions during system standby modes. The LTC3589 will shut down all regulators and pull down the WAKE pin under high temperature, VIN undervoltage, and extended low regulator output voltage conditions. Status of a hard shutdown is reported by the IRQ status pin and the IRQSTAT status register. The I2C serial port on the LTC3589 contains 13 command registers for controlling each of the regulators, one read- only register for monitoring each regulators power good status, one read-only register for reading the cause of an IRQ event, and one clear IRQ command register. The LTC3589 I2C supports random addressing of any register. LTC3589, LTC3589-1, AND LTC3589-2 FUNCTIONAL COMPARISON Table 1. summarizes the functional differences between the LTC3589, LTC3589-1, and LTC3589-2. Table 1. LTC3589, LTC3589-1, and LTC3589-2 Functional Differences LTC3589 LTC3589-1 LTC3589-2 Power-On Inhibit Enable Delay 1 second <2ms <2ms Buck2 Current Output 1A 1.2A 1.2A Buck3 Current Output 1A 1.2A 1.2A PGOOD Fault Timeout Enabled by Default. I2C Disable. Disabled by Default. I2C Enable. Disabled by Default. I2C Enable. PWR_ON to WAKE Delay 50ms 2ms 2ms LDO3 VOUT 1.8V 2.8V 2.8V LDO4 VOUT * Indicates Default VOUT 1.8V, 2.5V, 2.8V*, 3.3V 1.2V*, 1.8V, 2.5V, 3.2V 1.2V*, 1.8V, 2.5V, 3.2V Default LDO4 Enable LDO34_EN Pin I2CI2C Wait to Enable Until Output < 300mV Yes by Default. I2C Select. Yes by Default. I2C Select. No by Default. I2C Select. Insert 2k Discharge Resistor When Disabled Yes if Start-Up is Wait to Enable Until Output < 300mV Yes if Start-Up is Wait to Enable Until Output < 300mV Always Details of the operation of the LTC3589 are found in the following sections. ALWAYS-ON LDO The LTC3589 includes a low quiescent current low dropout regulator that remains powered whenever a valid supply is present on VIN. The always-on LDO will remain active until VIN drops below 2.0V (typical). This is below the 2.5V OPERATION |
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