ADP1879ACPZ-0.3-R7 datasheet(33/40 Pages) AD

33 / 40 page

Data Sheet

ADP1878/ADP1879

Rev. A | Page 33 of 40

LAYOUT CONSIDERATIONS

The performance of a dc-to-dc converter depends highly on

how the voltage and current paths are configured on the printed

circuit board (PCB). Optimizing the placement of sensitive

analog and power components are essential to minimize output

ripple, maintain tight regulation specifications, and reduce

PWM jitter and electromagnetic interference.

Figure 86 shows the schematic of a typical ADP1878/ADP1879

used for a high current application. Blue traces denote high current

pathways. VIN, PGND, and VOUT traces should be wide and

possibly replicated, descending down into the multiple layers.

Vias should populate, mainly around the positive and negative

terminals of the input and output capacitors, alongside the source

of Q1/Q2, the drain of Q3/Q4, and the inductor.

Figure 86. ADP1878 High Current Evaluation Board Schematic (Blue Traces Indicate High Current Paths)

Figure 87. Overall Layout of the ADP1878/ADP1879 High Current Evaluation Board

MURATA: (HIGH VOLTAGE INPUT CAPACITORS)

22µF, 25V, X7R, 1210 GRM32ER71E226KE15L

PANASONIC: (OUTPUT CAPACITORS)

270µF, SP-SERIES, 4V, 7mΩ, EEFUE0G271LR

INFINEON FETs:

BSC042N03MS G (LOWER SIDE)

BSC080N03MS G (UPPER SIDE)

WÜRTH INDUCTORS:

1µH, 3.8mΩ, 16A, 7443552100

HIGH VOLTAGE INPUT

VIN = 12V

CBST

100nF

VOUT = 1.8V, 15A

22µF

N/A

C23

270µF

C22

270µF

C21

270µF

C20

270µF

C27

N/A

C14 TO C19

N/A

C26

N/A

C25

N/A

C24

N/A

1.0µH

RSNB

2Ω

CSNB

1.5nF

RTOP 2kΩ

R7 10kΩ

RBOT

1kΩ

VOUT

VIN

BST

COMP

DRVH

GND

DRVL

ADP1878/

ADP1879

430pF

CPAR

53pF

57kΩ

1µF

CVIN

22µF

0.1µF

JP3

RRES

100kΩ

PGND

RES

PGOOD

VREG

5kΩ

VREG

CSS

34nF

VREG

INPUT CAPACITORS

ARE MOUNTED CLOSE

TO DRAIN OF Q1/Q2

AND SOURCE OF Q3/Q4

SEPARATE ANALOG

GROUND PLANE FOR

COMPENSATION AND

FEEDBACK RESISTORS

SENSITIVE ANALOG

COMPONENTS

LOCATED FAR

FROM NOISY

POWER SECTION

OUTPUT

CAPACITORS

ARE MOUNTED

AT RIGHTMOST

AREA OF

EVALUATION

BOARD

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