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SC508 датащи(PDF) 17 Page - Semtech Corporation |
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SC508 датащи(HTML) 17 Page - Semtech Corporation |
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17 / 32 page ![]() SC508/SC508A 17 FB threshold High-side Drive (DH) Low-side Drive (DL) VOUT drifts up to due to leakage current flowing into COUT DH and DL off DL turns on when Smart PSAVE threshold is reached Smart Power Save Threshold DL turns off when FB threshold is reached Single DH on-time pulse after DL turn-off VOUT discharges via inductor and low-side MOSFET Normal DL pulse after DH on-time pulse Normal VOUT ripple Figure 8 — Smart Power-Save SmartDriveTM For each DH pulse, the DH driver initially turns on the high-side MOSFET at a slower speed, allowing a softer, smooth turn-off of the low-side diode. Once the diode is off and the LX voltage has risen 0.8V above PGND, the SmartDrive circuit automatically drives the high-side MOSFET on at a rapid rate. This technique reduces switch- ing noise while maintaining high efficiency, reducing the need for snubbers. Enable Input for Switching Regulator The EN input is a logic level input. When EN is low (grounded), the switching regulator is off and in its lowest power state. When EN is low and VDDA is above the VDDA UVLO threshold, the output of the switching regulator soft-discharges into the VOUT pin through an internal 2kΩ resistor. When EN is a logic high (>1V) the switching regulator is enabled. The EN input has internal resistors — 2MΩ pullup to VDDA, and a 1MΩ pulldown to AGND. These resistors will normally cause the EN voltage to be near the logic high trip point as VDDA reaches the VDDA UVLO threshold. To prevent undesired toggling of EN and erratic start-up performance, the EN pin should not be allowed to float as open-circuit. Note that the LDO enable pin (ENL) can also disable the switching regulator through the V IN UVLO function. Refer to the ENL Pin and V IN UVLO section. Current Limit Protection The SC508 features programmable current limiting, which is accomplished using the RDS (ON) of the lower MOSFET for current sensing. The current limit is set by R LIM resistor which connects from the ILIM pin to the drain of the low- side MOSFET. When the low-side MOSFET is on, an internal 10μA current flows from the ILIM pin and through the R LIM resistor, creating a voltage drop across the resistor. While the low-side MOSFET is on, the inductor current flows through it and creates a voltage across the RDS (ON). The voltage across the MOSFET is negative with respect to PGND. If this MOSFET voltage drop exceeds the voltage across R LIM, the voltage at the ILIM pin will be negative and current limit will activate. The current limit then keeps the low-side MOSFET on and prevents another high-side on- time, until the current in the low-side MOSFET reduces enough to bring the ILIM pin voltage up to zero. This method regulates the inductor valley current at the level shown by I LIM in Figure 9. Time IPEAK ILOAD ILIM Figure 9 — Valley Current Limit Applications Information (continued) |
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