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AFS090 датащи(PDF) 249 Page - Microsemi Corporation |
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AFS090 датащи(HTML) 249 Page - Microsemi Corporation |
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249 / 334 page ![]() Fusion Family of Mixed Signal FPGAs R e visio n 2 2 - 233 IEEE 1532 Characteristics JTAG timing delays do not include JTAG I/Os. To obtain complete JTAG timing, add I/O buffer delays to the corresponding standard selected; refer to the I/O timing characteristics in the "User I/Os" section on page 2-134 for more details. Timing Characteristics Table 2-186 • JTAG 1532 Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V Parameter Description –2 –1 Std. Units tDISU Test Data Input Setup Time 0.50 0.57 0.67 ns tDIHD Test Data Input Hold Time 1.00 1.13 1.33 ns tTMSSU Test Mode Select Setup Time 0.50 0.57 0.67 ns tTMDHD Test Mode Select Hold Time 1.00 1.13 1.33 ns tTCK2Q Clock to Q (data out) 6.00 6.80 8.00 ns tRSTB2Q Reset to Q (data out) 20.00 22.67 26.67 ns FTCKMAX TCK Maximum Frequency 25.00 22.00 19.00 MHz tTRSTREM ResetB Removal Time 0.00 0.00 0.00 ns tTRSTREC ResetB Recovery Time 0.20 0.23 0.27 ns tTRSTMPW ResetB Minimum Pulse TBD TBD TBD ns Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on page 3-9. |
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