HT95R22 datasheet(14/52 Pages) HOLTEK

14 / 52 page

HT95R22

Rev. 1.00

January 6, 2009

· Z is set if the result of an arithmetic or logical operation

is zero; otherwise Z is cleared.

· OV is set if an operation results in a carry into the high-

est-order bit but not a carry out of the highest-order bit,

or vice versa; otherwise OV is cleared.

· PDF is cleared by a system power-up or executing the

²CLR WDT² instruction. PDF is set by executing the

²HALT² instruction.

· TO is cleared by a system power-up or executing the

²CLR WDT² or ²HALT² instruction. TO is set by a

WDT time-out.

In addition, on entering an interrupt sequence or execut-

ing a subroutine call, the status register will not be

pushed onto the stack automatically. If the contents of

the status registers are important and if the subroutine

can corrupt the status register, precautions must be

taken to correctly save it.

Interrupt Control Register

- INTC0, INTC1

These two 8-bit register, known as the INTC0 and

INTC1 registers, control the operation of both external

and internal timer, interrupts, etc. By setting various bits

within this register using standard bit manipulation in-

structions, the enable/disable function of the external

and timer interrupts can be independently controlled. A

master interrupt bit within this register, the EMI bit, acts

like a global enable/disable and is used to set all of the

interrupt enable bits on or off. This bit is cleared when an

interrupt routine is entered to disable further interrupt

and is set by executing the

²RETI² instruction.

Timer/Event Counter Registers

This device contains two 16-bit Timer/Event Counters,

which have associated register pairs known as TMR0L/

TMR0H and TMR1L/TMR1H. These are the locations

where the timers 16-bit value is located. Two associated

control registers, known as TMR0C and TMR1C, con-

tain the setup information for these two timers.

Input/Output Ports and Control Registers

Within the area of Special Function Registers, the I/O

registers and their associated control registers play a

prominent role. All I/O ports have a designated register

correspondingly labeled as PA, PC and PD. These la-

beled I/O registers are mapped to specific addresses

within the Data Memory as shown in the Data Memory

table, which are used to transfer the appropriate output

or input data on that port. with each I/O port there is an

associated control register labeled PAC, PCC and PDC,

also mapped to specific addresses with the Data Mem-

ory. The control register specifies which pins of that port

are set as inputs and which are set as outputs. To setup

a pin as an input, the corresponding bit of the control

low. During program initialization, it is important to first

setup the control registers to specify which pins are out-

puts and which are inputs before reading data from or

writing data to the I/O ports. One flexible feature of these

registers is the ability to directly program single bits us-

ing the

²SET [m].i² and ²CLR [m].i² instructions. The

ability to change I/O pins from output to input and vice

versa by manipulating specific bits of the I/O control reg-

isters during normal program operation is a useful fea-

ture of these devices.

DTMF Registers

- DTMFC, DTMFD

The device contains fully integrated DTMF generator

circuitry for generation of DTMF signals. The DTMF

generator also requires two registers for its operation, a

DTMFC register for its overall control and DTMFD regis-

ter to store the digital codes that are to be generated as

DMTF signals.

Mode Register

- MODE

The device supports two system clock and four opera-

tion modes. The system clock could be 32768Hz or

3.58MHz and operation mode could be Normal, Green,

Sleep or Idle mode. These are all selected by the soft-

ware.

MFIC Register

- MFIC

PC0 could be used to trigger an extra interrupt. It is en-

abled or disabled individually by bit0 of MFIC. When a

multi-function interrupt occurs, the programmer should

check bit4 of MFIC to determine the cause of the interrupt.

RTCC Register

The device contains a Real Time Clock function other-

wise known as the RTC. To control this function a regis-

ter known as the RTCC register is provided which

provides the overall on/off control and time out flag.

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