ZXLD1371QESTTC datasheet(2/42 Pages) DIODES

2 / 42 page

ZXLD1371

Document number: DS35436 Rev. 1 - 2

2 of 42

www.diodes.com

February 2012

A Product Line of

Diodes Incorporated

Pin Descriptions

Name

Type

(Note 2)

Description

ADJ

Adjust input (for dc output current control)

Connect to REF to set 100% output current.

Drive with dc voltage (125mV<VADJ< 1.25V) to adjust output current from 10% to 100%

of set value. The ADJ pin has an internal clamp that limits the internal node to less than

3V. This provides some failsafe should they get overdriven

REF

Internal 1.25V reference voltage output

TADJ

Temperature Adjust input for LED thermal current control

Connect thermistor/resistor network to this pin to reduce output current above a preset

temperature threshold.

Connect to REF to disable thermal compensation function. (See section on thermal

control.)

SHP

I/O

Shaping capacitor for feedback control loop

Connect 330pF ±20% capacitor from this pin to ground to provide loop compensation

STATUS

Operation status output (analog output)

Pin is at 4.5V (nominal) during normal operation.

Pin switches to a lower voltage to indicate specific operation warnings or fault

conditions. (See section on STATUS output.)

Status pin voltage is low during shutdown mode

SGND

Signal ground (Connect to 0V)

PGND

Power ground - Connect to 0V and pin 8 to maximize copper area

N/C

Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB

copper for thermal dissipation

N/C

Not Connected internally – recommend connection pin 10 (GATE) to permit wide copper

trace to gate of MOSFET

GATE

Gate drive output to external NMOS transistor – connect to pin 9

VAUX

Auxiliary positive supply to internal switch gate driver

At VIN < 8V; a bootstrap circuit is recommended to ensure adequate gate drive voltage

(see Applications section)

At VIN > 8V; connect to VIN

At VIN >24V; to reduce power dissipation, VAUX can be connected to an 8V to 15V

auxiliary power supply (see Applications section). Decouple to ground with capacitor

close to device (see Applications section)

VIN

Input supply to device 5V to 60V

Decouple to ground with capacitor close to device (refer to Applications section)

ISM

Current monitor input. Connect current sense resistor between this pin and VIN

The nominal voltage, VSENSE, across the resistor is 218mV fixed in Buck mode and

initially 225mV in Boost and Buck-Boost modes, varying with duty cycle.

FLAG

Flag open drain output

Pin is high impedance during normal operation

Pin switches low to indicate a fault, or warning condition

PWM

Digital PWM output current control

Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.

Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming

control.

The device enters standby mode when PWM pin is driven with logic low level for more

than 15ms nominal (Refer to application section for more details)

Gain setting input

Used to set the device in Buck mode or Boost, Buck-boost modes and to control the

sense voltage in Boost and Buck-boost modes

Connect to ADJ pin for Buck mode operation

For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. The

GI divider is required to compensate for duty cycle gating in the internal feedback loop

(see Application section). The GI pin has an internal clamp that limits the internal node to

less than 3V. This provides some failsafe should it become overdriven.

PAD

Exposed paddle. Connect to 0V plane for electrical and thermal management

Notes:

2. Type refers to whether or not pin is an Input, Output, Input/Output or Power supply pin.

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