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MSC1202Y2RHHT датащи(PDF) 75 Page - Texas Instruments |
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MSC1202Y2RHHT датащи(HTML) 75 Page - Texas Instruments |
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75 / 92 page ![]() MSC1200 MSC1201 MSC1202 SBAS317E − APRIL 2004 − REVISED MAY 2006 www.ti.com 75 Low Voltage Detect Control (LVDCON) 7 6 5 4 3 2 1 0 Reset Value SFR E7h ALVDIS 0 0 0 ALVD3 ALVD2 ALVD1 ALVD0 8Fh ALVDIS Analog Low Voltage Detect Disable. bit 7 0 = Enable Detection of Low Analog Supply Voltage (ALVD flag and interrupt are set when AVDD < ALVD threshold) 1 = Disable Detection of Low Analog Supply Voltage ALVD3−0 Analog Low Voltage Detect. Sets ALVD threshold. bits 7−4 0000: 4.6V 0001: 4.2V 0010: 3.8V 0011: 3.6V 0100: 3.3V 0101: 3.1V 0110: 2.9V 0111: 2.7V 1000: Reserved 1001: Reserved 1010: Reserved 1011: Reserved 1100: Reserved 1101: Reserved 1110: Reserved 1111: Reserved Extended Interrupt Enable (EIE) 7 6 5 4 3 2 1 0 Reset Value SFR E8h 1 1 1 EWDI EX5 EX4 EX3 EX2 E0h EWDI Enable Watchdog Interrupt. This bit enables/disables the watchdog interrupt. The Watchdog timer is enabled by bit 4 the WDTCON (SFR FFh) and PDCON (SFR F1h) registers. 0 = Disable the Watchdog Interrupt 1 = Enable Interrupt Request Generated by the Watchdog Timer EX5 External Interrupt 5 Enable. This bit enables/disables external interrupt 5. bit 3 0 = Disable External Interrupt 5 1 = Enable External Interrupt 5 EX4 External Interrupt 4 Enable. This bit enables/disables external interrupt 4. bit 2 0 = Disable External Interrupt 4 1 = Enable External Interrupt 4 EX3 External Interrupt 3 Enable. This bit enables/disables external interrupt 3. bit 1 0 = Disable External Interrupt 3 1 = Enable External Interrupt 3 EX2 External Interrupt 2 Enable. This bit enables/disables external interrupt 2. bit 0 0 = Disable External Interrupt 2 1 = Enable External Interrupt 2 |
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