HT48R005 datasheet(46/62 Pages) HOLTEK

46 / 62 page

HT48R005/HT46R005

Rev. 1.00

November 29, 2011

Timer/Event Counter Interrupt

For a Timer/Event Counter interrupt to occur, the global

interrupt enable bit, EMI, and the corresponding timer

interrupt enable bit, T0EG, must first be set. An actual

Timer/Event Counter interrupt will take place when the

Timer/Event Counter request flag, T0F, is set, a situation

that will occur when the relevant Timer/Event Counter

overflows. When the interrupt is enabled, the stack is

not full and a Timer/Event Counter overflow occurs, a

subroutine call to the relevant timer interrupt vector, will

take place. When the interrupt is serviced, the timer in-

terrupt request flag, T0F, will be automatically reset and

the EMI bit will be automatically cleared to disable other

interrupts.

Programming Considerations

By disabling the interrupt enable bits, a requested inter-

rupt can be prevented from being serviced, however,

once an interrupt request flag is set, it will remain in this

condition in the interrupt register until the corresponding

interrupt is serviced or until the request flag is cleared by

a software instruction.

It is recommended that programs do not use the

²CALL

subroutine

² instruction within the interrupt subroutine.

Interrupts often occur in an unpredictable manner or

need to be serviced immediately in some applications. If

only one stack is left and the interrupt is not well con-

trolled, the original control sequence will be damaged

once a

²CALL subroutine² is executed in the interrupt

subroutine.

All of these interrupts have the capability of waking up

the processor when in the Sleep Mode.

Only the Program Counter is pushed onto the stack. If

the contents of the register or status register are altered

by the interrupt service program, which may corrupt the

desired control sequence, then the contents should be

saved in advance.

Configuration Options

Configuration options refer to certain options within the MCU that are programmed into the OTP Program Memory de-

vice during the programming process. During the development process, these options are selected using the HT-IDE

software development tools. As these options are programmed into the device using the hardware programming tools,

once they are selected they cannot be changed later by the application software. All options must be defined for proper

system function, the details of which are shown in the table.

No.

Options

Watchdog Timer: enable or disable

Watchdog Timer clock source: LIRC or fSYS/4

CLRWDT instructions: 1 or 2 instructions

System oscillator configuration: HXT, HIRC, ERC

LVR function: enable or disable

LVR voltage: 2.1V, 3.15V or 4.2V

RES or PA7 pin function

Internal RC: 4MHz, 8MHz or 12MHz

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