ACT5830 datasheet(11/41 Pages) ACTIVE-SEMI

11 / 41 page

SYSTEM MANAGEMENT

ACT5830

Rev 2, 20-Jan-11

Innovative Power

- 11 -

www.active-semi.com

ActivePMU

TM is a trademark of Active-Semi.

2CTM is a trademark of NXP.

FUNCTIONAL DESCRIPTIONS

The ACT5830 offers a wide array of system

management functions that allow it to be configured for

optimal performance in a wide range of applications.

I²C Serial Interface

At the core of the ACT5830’s flexible architecture is

an I2C interface that permits optional programming

capability to enhance overall system performance.

Use standard I2C write-byte commands to program

the ACT5830 and read-byte commands to read the

IC’s status. Figure 1: I2C Serial Bus Timing provides

a standard timing diagram for the I2C protocol. The

ACT5830 always operates as a slave device, with

address 1010101.

System Startup & Shutdown

The

ACT5830

features

flexible

enable

architecture that allows it to support a variety of

push-button enable/disable schemes. Although

other startup routines are possible, a typical startup

and shutdown process would proceed as follows

(referring to Figure 2):

System startup is initiated whenever one of the

following conditions occurs:

1) The user presses the push-button, asserting

PWR_ON high,

2) A valid supply (>4V) is connected to the

charger input (CHG_IN), or

3) A headset is connected, asserting HF_PWR

high.

The ACT5830QJ1CF begins its system startup

procedure by enabling REG, LDO7 and LDO8, then

LDO1 are enabled when VBUCK reaches 87% of

its final value; The ACT5830QJ182 begins its

system startup procedure by enabling REG, LDO1,

LDO7 and LDO8. nRST is asserted low when

VOUT1 reaches 87% of its final value, holding the

microprocessor in reset for a user-selectable reset

period of 65ms. If VBUCK and VOUT1 are within

13% of their regulation voltages when the reset

timer expires, the ACT5830 de-asserts nRST so that

the microprocessor can begin its power up

sequence. Once the power-up routine is successfully

completed, the microprocessor asserts PWR_HOLD

high to keep the ACT5830 enabled after the push-

button is released by the user.

Once the power-up routine is completed, the

remaining LDOs can be enabled/disabled via either

the I2C interface or the TCXO_EN (LDO4), RX_EN

(LDO5), TX_EN (LDO6), and PWR_HOLD (REG

and LDO1) pins.

This start-up procedure requires that the push-

button be held until the microprocessor assumes

control of PWR_HOLD, providing protection against

inadvertent momentary assertions of the push-

button. If desired, longer “push-and-hold” times can

be easily implemented by simply adding an

additional delay before assuming control of

PWR_HOLD. If the microprocessor is unable to

complete its power-up routine successfully before

the user lets go of the push-button, the ACT5830

will automatically shut itself down.

Once a successful power-up routine is completed,

the user can initiate a shutdown process by

pressing the push-button a second time. Upon

detecting a second assertion of PWR_ON (by

depressing the push-button), the ACT5830 asserts

nON to interrupt the microprocessor which initiates

an interrupt service routine that will reveal that the

user pressed the push-button. If HF_PWR and

CHG_OK are both low, the microprocessor then

initiates a power-down routine, the final step of

which will be to de-assert PWR_HOLD, disabling

REG and LDO1.

Open Drain Outputs

The ACT5830 includes two n-channel open drain

outputs (OD1 and OD2) that can be used for driving

external loads such as WLEDs or a vibrator motor,

as shown in the functional diagram. Each of the OD

outputs is enabled when either it's respective ODIx

pin in driven to a logic high.

nACOK Output

The ACT5830's nACOK output provides a logic-level

indication of the status of the voltage at CHG_IN.

nACOK is an open-drain output which sinks current

whenever VCHG_IN > 4V.

Thermal Overload Protection

The ACT5830 integrates thermal overload protection

circuitry to prevent damage resulting from excessive

thermal stress that may be encountered under fault

conditions, for example. This circuitry disables all

regulators if the ACT5830 die temperature exceeds

160° C, and prevents the regulators from being

enabled until the die temperature drops by 20°C

(typ), after which a normal startup routine may

commence.

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