8M (1M × 8) Flash Memory

LH28F008SA

21

SYMBOL

PARAMETER

V

V

V

UNIT

NOTE

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

t

AVAV

t

WC

Write Cycle Time

85

90

120

ns

t

PHWL

t

PS

PWD High Recovery to WE

Going Low

1

1

1

µs

2

t

ELWL

t

CS

CE

10

10

10

ns

t

WLWH

t

WP

WE Pulse Width

40

40

40

ns

t

VPWH

t

VPS

V

100

100

100

ns

2

t

AVWH

t

AS

Address Setup to WE

Going High

40

40

40

ns

3

t

DVWH

t

OS

Data Setup to WE

Going High

40

40

40

ns

4

t

WHDX

t

DH

Data Hold from WE High

5

5

5

ns

t

WHAX

t

AH

Address Hold from WE High

5

5

5

ns

t

WHEH

t

OH

OE

10

10

10

ns

t

WHWL

t

WHP

WE Pulse Width High

30

30

30

ns

t

WHRL

WE High to RY

Low

100

100

100

ns

t

WHQV

1

Duration of Byte Write

Operation

666

µs

t

WHQV

2

Duration of Block Erase

Operation

0.3

0.3

0.3

s

t

WHGL

Write Recovery before Read

0

0

0

µs

t

QVVL

t

VPH

V

RY

000

ns

NOTES:

1. Read timing characteristics during erase and byte write operations are the same as during read-only operations.

Refer to AC Characteristics for Read-Only Operations.

2. Sampled, not 100% tested.

5. The on-chip Write State Machine incorporates all byte write and block erase system functions and overhead of standard Intel flash

memory, including byte program and verify (byte write) and block precondition, precondition verify, erase and erase verify (block erase).

6. Byte write and block erase durations are measure to completion (SR.7 = 1. RY

tion of byte write/block erase success (SR.3/4/5 = 0).

7. See High Speed AC Input/Output Reference Waveforms and High Speed AC Testing Load Circuits for testing characteristics.

8. See AC Input/Output Reference Waveforms and AC Testing Load Circuits for testing characteristics.