| поискавой системы для электроныых деталей |
|
DAC3482 датащи(PDF) 39 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DAC3482 датащи(HTML) 39 Page - Texas Instruments |
|
39 / 79 page ![]() DAC3482 www.ti.com SLAS748A – MARCH 2011 – REVISED JUNE 2011 Register name: config39 – Address: 0x27, Default: 0xEAEA Register Default Address Bit Name Function Value Name config39 0x27 15:0 iotest_pattern2 Dataword2 in the IO test pattern. It is used with the seven other words to test the input 0xEAEA data. Register name: config40 – Address: 0x28, Default: 0x4545 Register Default Address Bit Name Function Value Name config40 0x28 15:0 iotest_pattern3 Dataword3 in the IO test pattern. It is used with the seven other words to test the input data. 0x4545 Register name: config41 – Address: 0x29, Default: 0x1A1A Register Default Address Bit Name Function Value Name config41 0x29 15:0 iotest_pattern4 Dataword4 in the IO test pattern. It is used with the seven other words to test the input data. 0x1A1A Register name: config42 – Address: 0x2A, Default: 0x1616 Register Default Address Bit Name Function Value Name config42 0x2A 15:0 iotest_pattern5 Dataword5 in the IO test pattern. It is used with the seven other words to test the input 0x1616 data. Register name: config43 – Address: 0x2B, Default: 0xAAAA Register Default Address Bit Name Function Value Name config43 0x2B 15:0 iotest_pattern6 Dataword6 in the IO test pattern. It is used with the seven other words to test the input 0xAAAA data. Register name: config44 – Address: 0x2C, Default: 0xC6C6 Register Default Address Bit Name Function Value Name config44 0x2C 15:0 iotest_pattern7 Dataword7 in the IO test pattern. It is used with the seven other words to test the input 0xC6C6 data. Register name: config45 – Address: 0x2D, Default: 0x0004 Register Default Address Bit Name Function Value Name config45 0x2D 15 Reserved Reserved for factory use. 0 14 ostrtodig_sel When set, the OSTR signal is passed directly to the digital block. This is the signal that 0 is used to clock the dividers. 13 ramp_ena When set, a ramp signal is inserted in the input data at the FIFO input. 0 12:1 Reserved Reserved for factory use. 0000 0000 0100 0 sifdac_ena When set, the DAC output is set to the value in sifdac(15:0) in register config48. 0 Register name: config46 – Address: 0x2E, Default: 0x0000 Register Default Address Bit Name Function Value Name config46 0x2E 15:8 Reserved Reserved for factory use. 0x00 7:0 grp_delayI(7:0) Sets the group delay function for DACI. The maximum delay ranges from 30ps to 0x00 100ps and is dependent on DAC sample clock. Contact TI for specific application information. Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): DAC3482 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |