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33981 датащи(PDF) 15 Page - Freescale Semiconductor, Inc |
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33981 датащи(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 37 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 15 33981 FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSTIC FEATURES Figure 11. Reverse Battery Protection GROUND (GND) DISCONNECT PROTECTION If the DC motor module ground is disconnected from load ground, the device protects itself and safely turns OFF the output regardless of the output state at the time of disconnection. A 10 k resistor needs to be added between the EN pin and the rest of the circuitry in order to ensure the device turns off in case of ground disconnect and to prevent exceeding this pin’s maximum ratings. FAULT REPORTING This 33981 indicates the faults below as they occur by driving the FS pin to logic [0]: • Over-temperature fault • Over-current fault on OUT • Overload fault on the external low side MOSFET The FS pin will return to logic [1] when the over temperature fault condition is removed. The two other faults are latched. M VPWR VDD VPWR MCU 33981 No current GND OUT Diode 10.0 k Ω Table 6. Functional Truth Table in Fault Mode Conditions CONF INHS INLS OUT GLS FS EN TEMP CSNS OCLS Comments Over-temperature on OUT x x x L H L H L x x The 33981 is currently in Fault Mode. The OUT is OFF. TEMP at 0V indicates this fault. Once the fault is removed 33981 recovers its normal mode. Over-temperature on GLS x x x L L L H L x x The 33981 is currently in Fault Mode. The OUT is OFF and GLS is at 0V. TEMP at 0V indicates this fault. Once the fault is removed 33981 recovers its Normal Mode. Over-current on OUT x H L L x L H x L x The 33981 is currently in Fault Mode. The OUT is OFF. It is reset by a logic [0] at INHS for at least tRST(DIAG). When INHS goes to 0V, CSNS goes to 5.0 V. Overload on External Low Side MOSFET L L H x L L H x x L The 33981 is currently in Fault Mode. GLS is at 0 V and OCLS internal current source is off. The external resistance connected between OCLS and GND pin will pull OCLS pin to 0V. The fault is reset by a logic [0] at INLS for at least tRST(DIAG). H = High level L = Low level x = Don’t care |
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