33480 datasheet(4/39 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33480

TERMINAL CONNECTIONS

Notes

The pins 14, 17 and 23 must be shorted on the board.

Input

Master-Out Slave-

This data input is sampled on the positive edge of the SCLK. This terminal has

an active internal pulldown current source.

VCC

Power

Logic Supply

SPI Logic power supply.

Output

Master-In Slave-

Out

SPI data is sent to the MCU by this terminal. This data output changes on the

negative edge of SCLK and when CS is high, this terminal is high impedance.

FETOUT

Output

External FET Gate This terminal controls an external SMART MOSFET by logic level. This output

is also called OUT6.

14,17,23

GND

Ground

This terminal is the ground for the logic and analog circuitry of the device(1).

VBAT

Power

Battery Input

Power supply terminal.

Output

Charge Pump

This terminal is the connection for an external tank capacitor (for internal use

only).

OUT1

OUT5

Output

Output 1

Output 5

Protected 35 m

Ω high-side power output to the load.

OUT2

OUT3

OUT4

Output

Output 2

Output 3

Output 4

Protected 10 m

Ω high-side power output to the load.

CSNS

Output

Current Sense

Output

This terminal is used to output a current proportional to OUT1:OUT5, FETin

current, and it is used externally to generate a ground-referenced voltage for the

microcontroller to monitor output current. OUT1:OUT5 and FETin choice is SPI

programmable.

Table 1. 33480 Terminal Definitions (continued)

A functional description of each terminal can be found in the Functional Terminal Description section beginning on Page 17.

Terminal

Number

Terminal

Name

Terminal

Function

Formal Name

Definition

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