PCA85232DA datasheet(22/54 Pages) NXP

22 / 54 page

PCA85232

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Product data sheet

Rev. 1 — 8 December 2010

22 of 54

NXP Semiconductors

PCA85232

LCD driver for low multiplex rates

By connecting pin SDAACK to pin SDA on the PCA85232, the SDA line becomes fully

I2C-bus compatible. In COG applications where the track resistance from the SDAACK

pin to the system SDA line can be significant, possibly a voltage divider is generated by

the bus pull-up resistor and the Indium Tin Oxide (ITO) track resistance. As a

consequence it may be possible that the acknowledge generated by the PCA85232 can’t

be interpreted as logic 0 by the master. In COG applications where the acknowledge cycle

is required, it is therefore necessary to minimize the track resistance from the SDAACK

pin to the system SDA line to guarantee a valid LOW level.

By separating the acknowledge output from the serial data line (having the SDAACK open

circuit) design efforts to generate a valid acknowledge level can be avoided. However, in

that case the I2C-bus master has to be set up in such a way that it ignores the

acknowledge cycle.2

The following definition assumes SDA and SDAACK are connected and refers to the pair

as SDA.

7.16.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time

will be interpreted as a control signal (see Figure 13).

7.16.1.1

START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW change

of the data line, while the clock is HIGH is defined as the START condition (S).

A LOW-to-HIGH change of the data line while the clock is HIGH is defined as the STOP

condition (P). The START and STOP conditions are shown in Figure 14.

For further information, please consider the NXP application note: Ref. 1 “AN10170”.

Fig 13. Bit transfer

mba607

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Fig 14. Definition of START and STOP conditions

mbc622

SDA

SCL

STOP condition

SDA

SCL

START condition

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