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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F101X8 датащи(PDF) 52 Page - STMicroelectronics |
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STM32F101X8 датащи(HTML) 52 Page - STMicroelectronics |
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52 / 85 page  Electrical characteristics STM32F101x8, STM32F101xB 52/85 Doc ID 13586 Rev 13 5.3.11 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: ● A supply overvoltage is applied to each power supply pin ● A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78 IC latch-up standard. 5.3.12 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 33 are derived from tests performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL compliant. Table 31. ESD absolute maximum ratings Symbol Ratings Conditions Class Maximum value(1) 1. Based on characterization results, not tested in production. Unit VESD(HBM) Electrostatic discharge voltage (human body model) TA +25 °C conforming to JESD22-A114 2 2000 V VESD(CDM) Electrostatic discharge voltage (charge device model) TA +25 °C conforming to JESD22-C101 II 500 Table 32. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class TA +85 °C conforming to JESD78A II level A |
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