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M24C32-R датащи(PDF) 9 Page - STMicroelectronics

номер детали M24C32-R
подробное описание детали  32 Kbit serial I²C bus EEPROM
PDF  38 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24C32-R датащи(HTML) 9 Page - STMicroelectronics

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Signal description
Doc ID 4578 Rev 17
9/38
2.5
VSS ground
VSS is the reference for the VCC supply voltage.
2.6
Supply voltage (VCC)
2.6.1
Operating supply voltage VCC
Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage
within the specified [VCC(min), VCC(max)] range must be applied (see Table 7, Table 8 and
Table 9). In order to secure a stable DC supply voltage, it is recommended to decouple the
VCC line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the
VCC/VSS package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (tW).
2.6.2
Power-up conditions
The VCC voltage has to rise continuously from 0 V up to the minimum VCC operating voltage
defined in Table 7, Table 8 and Table 9. The rise time must not vary faster than 1 V/µs.
2.6.3
Device reset
In order to prevent inadvertent Write operations during power-up, a power on reset (POR)
circuit is included. At power-up (continuous rise of VCC), the device does not respond to any
instruction until VCC has reached the power on reset threshold voltage (this threshold is
lower than the minimum VCC operating voltage defined in Table 8 and Table 9). Until VCC
passes over the POR threshold, the device is reset and in Standby Power mode.
In a similar way, during power-down (continuous decay of VCC), as soon as VCC drops below
the POR threshold voltage, the device is reset and stops responding to any instruction sent
to it.
2.6.4
Power-down conditions
During power-down (continuous decay of VCC), the device must be in Standby Power mode
(mode reached after decoding a Stop condition, assuming that there is no internal Write
cycle in progress).



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