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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WLCSP16 датащи(PDF) 23 Page - NXP Semiconductors |
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WLCSP16 датащи(HTML) 23 Page - NXP Semiconductors |
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23 / 38 page  LPC1102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Objective data sheet Rev. 00 — 23 June 2010 23 of 38 NXP Semiconductors LPC1102 32-bit ARM Cortex-M0 microcontroller Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL= 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled. (1) System PLL disabled; IRC enabled. (2) System PLL enabled; IRC disabled. Fig 8. Sleep mode: Typical supply current IDDversus temperature for different system clock frequencies Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register (PDSLEEPCFG = 0x0000 18FF). Fig 9. Deep-sleep mode: Typical supply current IDD versus temperature for different supply voltages VDD X (X) X X X XX 001aac984 X X X X X X (X) X <tbd> X (X) X X X XX 001aac984 X X X X X X (X) X <tbd> |
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