WLCSP16 datasheet(18/38 Pages) NXP

18 / 38 page

LPC1102

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Objective data sheet

Rev. 00 — 23 June 2010

18 of 38

NXP Semiconductors

LPC1102

32-bit ARM Cortex-M0 microcontroller

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

°C), nominal supply voltages.

[2]

Tamb =25 °C.

[3]

IDD measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.

[4]

IRC enabled; external clock disabled; system PLL disabled.

[5]

BOD disabled.

[6]

All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to UART and SPI0/1 disabled in system configuration

block.

[7]

<tbd>; system PLL enabled.

[8]

All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0x0000 18FF.

[9]

Including voltage on outputs in 3-state mode.

[10] VDD supply voltage must be present.

[11] Allowed as long as the current limit does not exceed the maximum current allowed by the device.

[12] To VSS.

[1]

The ADC is monotonic, there are no missing codes.

IOL

LOW-level output

current

VOL =0.4 V

2.0 V

≤ V

DD ≤ 3.6 V

--mA

1.8 V

≤ V

DD < 2.0 V

--mA

IOHS

HIGH-level short-circuit

output current

VOH =0 V

[11] --

−45

IOLS

LOW-level short-circuit

output current

VOL =VDD

[11] --50

Ipd

pull-down current

VI =5V

150

μA

Ipu

pull-up current

VI =0V;

2.0 V

≤ V

DD ≤ 3.6 V

−15

−50

−85

μA

1.8 V

≤ V

DD < 2.0 V

−10

−50

−85

μA

VDD <VI < 5 V

000

μA

External clock input

Vi(xtal)

crystal input voltage

−0.5

1.8

1.95

Table 5.

Static characteristics …continued

Tamb = −40 °C to +85 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

Table 6.

ADC static characteristics

Tamb = −40 °C to +85 °C unless otherwise specified; ADC frequency 4.5 MHz, VDD = 2.5 V to 3.6 V.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIA

analog input voltage

VDD

Cia

analog input capacitance

differential linearity error

[1][2] --

± 1LSB

EL(adj)

integral non-linearity

[3] --

± 1.5

LSB

offset error

[4] --

± 3.5

LSB

gain error

[5] --0.6

absolute error

[6] --

± 4LSB

Rvsi

voltage source interface

resistance

--40

input resistance

[7][8] --2.5

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