ADP320 datasheet(16/20 Pages) AD

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ADP320

Rev. 0 | Page 16 of 20

Use Equation 1 to determine the worst-case capacitance

accounting for capacitor variation over temperature, compo-

nent tolerance, and voltage.

CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL)

(1)

where:

CBIAS is the effective capacitance at the operating voltage.

TEMPCO is the worst-case capacitor temperature coefficient.

TOL is the worst-case component tolerance.

In this example, TEMPCO over −40°C to +85°C is assumed

to be 15% for an X5R dielectric. TOL is assumed to be 10%,

and CBIAS is 0.94 μF at 1.8 V from the graph in Figure 43.

Substituting these values into Equation 1 yields

CEFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF

Therefore, the capacitor chosen in this example meets the mini-

mum capacitance requirement of the LDO over temperature

and tolerance at the chosen output voltage.

To guarantee the performance of the ADP320 triple LDO, it is

imperative that the effects of dc bias, temperature, and toler-

ances on the behavior of the capacitors are evaluated for each

application.

UNDERVOLTAGE LOCKOUT

The ADP320 triple LDO has an internal undervoltage lockout

circuit that disables all inputs and the output when the input

voltage bias, VBIAS, is less than approximately 2.2 V. This

ensures that the inputs of the ADP320 triple LDO and the

output behave in a predictable manner during power-up.

ENABLE FEATURE

The ADP320 triple LDO uses the ENx pins to enable and

disable the VOUTx pins under normal operating conditions.

Figure 44 shows a rising voltage on EN crossing the active

threshold, then VOUTx turns on. When a falling voltage on

ENx crosses the inactive threshold, VOUTx turns off.

ENABLE VOLTAGE (V)

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.4

0.6

0.5

0.7

0.9

0.8

1.0

1.1

1.2

VOUT @ 4.5VIN

Figure 44. Typical ENx Pin Operation

As shown in

Figure 44, the ENx pin has built-in hysteresis.

This prevents on/off oscillations that can occur due to noise

on the ENx pin as it passes through the threshold points.

The active/inactive thresholds of the ENx pin are derived

from the VBIAS voltage. Therefore, these thresholds vary with

changing input voltage. Figure 45 shows typical ENx active/

inactive thresholds when the input voltage varies from 2.5 V

to 5.5 V.

INPUT VOLTAGE (V)

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

2.5

3.0

3.5

4.0

4.5

5.0

5.5

VEN RISE

VEN FALL

Figure 45. Typical ENx Pins Thresholds vs. Input Voltage

The ADP320 triple LDO utilizes an internal soft start to limit

the inrush current when the output is enabled. The start-up

time for the 2.8 V option is approximately 220 μs from the time

the ENx active threshold is crossed to when the output reaches

90% of its final value. The start-up time is somewhat dependent

on the output voltage setting and increases slightly as the output

voltage increases.

CH3

CH2

500mV B

T 10.2%

CH1 1V

500mV

M100µs A CH1

540mV

CH4 500mV BW

VEN

VOUT1

VOUT2

VOUT3

Figure 46. Typical Start-Up Time,

ILOAD1 = ILOAD2 = ILOAD3 = 100 mA,

CH1 = VEN, CH2 = VOUT1, CH3 = VOUT2, CH4 = VOUT3

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