ADP320

Rev. 0 | Page 15 of 20

APPLICATIONS INFORMATION

CAPACITOR SELECTION

Output Capacitor

The ADP320 triple LDO is designed for operation with small,

space-saving ceramic capacitors, but the parts function with

most commonly used capacitors as long as care is taken in

regards to the effective series resistance (ESR) value. The ESR

of the output capacitor affects stability of the LDO control loop.

A minimum of 0.70 μF capacitance with an ESR of 1 Ω or less

is recommended to ensure stability of the ADP320 triple LDO.

Transient response to changes in load current is also affected by

output capacitance. Using a larger value of output capacitance

improves the transient response of the ADP320 triple LDO to

large changes in the load current. Figure 42 show the transient

response for an output capacitance value of 1 μF.

Ω

CH2 50mV

CH4 10mV

CH3 10mV

M40µs

A CH1

44mA

1

2

3

4

B

W

B

W

B

W

B

W

Figure 42. Output Transient Response,

Input Bypass Capacitor

Connecting a 1 μF capacitor from VIN1/VIN2, VIN3, and

VBIAS to GND reduces the circuit sensitivity to the PCB layout,

especially when long input traces or high source impedance are

encountered. If an output capacitance greater than 1 μF is

required, the input capacitor should be increased to match it.

Input and Output Capacitor Properties

Any good quality ceramic capacitor may be used with the ADP320

triple LDO, as long as the capacitor meets the minimum capacit-

ance and maximum ESR requirements. Ceramic capacitors are

manufactured with a variety of dielectrics, each with a different

behavior over temperature and applied voltage. Capacitors must

have an adequate dielectric to ensure the minimum capacitance

over the necessary temperature range and dc bias conditions.

X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are

recommended. Y5V and Z5U dielectrics are not recommended,

due to their poor temperature and dc bias characteristics.

Figure 43 depicts the capacitance vs. voltage bias characteristic

of an 0402 1 μF, 10 V, X5R capacitor. The voltage stability of a

capacitor is strongly influenced by the capacitor size and voltage

rating. In general, a capacitor in a larger package or higher voltage

rating exhibits better stability. The temperature variation of the

X5R dielectric is about ±15% over the −40°C to +85°C tempera-

ture range and is not a function of the package or voltage rating.

1.2

1.0

0.8

0.6

0.4

0.2

0

0

2

468

1

VOLTAGE (V)

0

Figure 43. Capacitance vs. Voltage Bias Characteristic