ADF7242BCPZ datasheet(39/108 Pages) AD

39 / 108 page

ADF7242

Rev. 0 | Page 39 of 108

on the required data rate to ensure optimum modulation

quality. The frequency synthesizer bandwidth is optimized for

the recommended modulation schemes, data rates, and fre-

quency deviations given in Table 22. If the user requires a

different modulation scheme or data rate from those listed in

Table 22, it is recommended, for optimum device performance,

to choose a frequency deviation for the required data rate that

gives a modulation index close to those recommended in Table 22.

RF CHANNEL FREQUENCY PROGRAMMING

The frequency of the synthesizer is programmed with the

frequency control word, ch_freq[23:0], which extends over

The frequency control word, ch_freq[23:0], contains a binary

representation of the absolute frequency of the desired channel

divided by 10 kHz.

Writing a new channel frequency value to the frequency control

word ch_freq[23:0] takes effect after the next frequency

synthesizer calibration phase. The frequency synthesizer is

calibrated by default during the transition into the PHY_RDY

from the idle state as well as in the TX, RX and CCA states.

Refer to the RF Frequency Synthesizer Calibration, Transmitter,

and Receiver sections for further details. To facilitate fast

channel frequency changes, a new frequency control word can

be written in the RX state before a packet has been received.

The next RC_RX o RC_TX command initiates the required

frequency synthesizer calibration and settling cycle. Similarly, a

new frequency control word can be written after a packet has

been transmitted while in the TX state and the next RC_RX or

RC_TX command initiates the frequency synthesizer

calibration and settling cycle.

REFERENCE CRYSTAL OSCILLATOR

The on-chip crystal oscillator generates the reference frequency

for the frequency synthesizer and system timing. The oscillator

operates at a frequency of 26 MHz. The crystal oscillator is

amplitude controlled to ensure a fast start-up time and stable

operation under different operating conditions. The crystal and

associated external components should be chosen with care

because the accuracy of the crystal oscillator can have a significant

impact on the performance of the communication system. Apart

from the accuracy and drift specification, it is important to

consider the nominal loading capacitance of the crystal.

Crystals with a high loading capacitance are less sensitive to

frequency pulling due to tolerances of external capacitors and the

printed circuit board parasitic capacitances. When selecting a

crystal, these advantages should be balanced against the higher

current consumption, longer start-up time, and lower trimming

range resulting from a larger loading capacitance.

The total loading capacitance must be equal to the specified

load capacitance of the crystal and comprises the external

parallel loading capacitors, the parasitic capacitances of the

XOSC26P and XOSC26N pins, as well as the parasitic

capacitance of tracks on the printed circuit board.

The ADF7242 has an integrated crystal oscillator tuning capacitor

that facilitates the compensation of systematic production

tolerance and temperature drift. The tuning capacitor is con-

trolled with Register xto26_trim _cal, Field xto26_trim (0x371).

The tuning range provided by the tuning capacitor depends on

the loading capacitance of a specific crystal. The total tuning

range is typically 25 ppm

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