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SA9101 датащи(PDF) 26 Page - Sames

номер детали SA9101
подробное описание детали  PCM FRAME ALIGNER
PDF  40 Pages
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производитель  SAMES [Sames]
домашняя страница  http://www.sames.co.za
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SA9101 датащи(HTML) 26 Page - Sames

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ADR B
Transmit S
n-bit stack
Register
Bit
Description
Name
CRBB[0-7]
0-7
5-byte Sn-bit stack, which data will be inserted if CRC and
stack mode enabled and no timeslot 0 transparent mode is
enabled. The Sn-bit information can be written into the
transmit Sn-bit stack when Transmit Sn-bit flag is set (SR5B7).
ADR C
Alarm Interrupt Mask Register
Register
Bit
Description
Name
CRCB0
0
Code violation counter saturation
CRCB1
1
Frame error counter saturation
CRCB2
2
CRC error counter saturation
CRCB3
3
Receive slip indication
CRCB4
4
Receive remote alarm
CRCB5
5
No signal
CRCB6
6
Alarm Indication Signal
CRCB7
7
Loss of synchronisation
Note:
The alarm source is enabled by setting the corresponding bit to “1”.
ADR D
IDLE Channel code
Register
Bit
Description
Name
CRDB[0-7]
0-7
Idle Channel code
During Loop-back, this code is sent to the remote end for the
assigned channel. The specified pattern is also written into all
channels selected via the Idle channel Register Bank, overwriting
whatever information was in those timeslots.
ADR E - F
Not used.



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