SC202 datasheet(15/19 Pages) SEMTECH

15 / 19 page

SC202

OUT Selection

The internal voltage loop compensation in the SC202

limits the minimum output capacitor value to 10μF. This

is due to its influence on the the loop crossover frequency,

phase margin, and gain margin. Increasing the output

capacitor above this minimum value will reduce the cross-

over frequency and provide greater phase margin.

Capacitors with X7R or X5R ceramic dielectric are recom-

mended for their low ESR and superior temperature and

voltage characteristics. Y5V capacitors should not be used

as their temperature coefficients make them unsuitable

for this application.

In addition to ensuring stability, the output capacitor

serves other important functions. This capacitor deter-

mines the output voltage ripple — as capacitance

increases, ripple voltage decreases. It also supplies current

during a large load step for a few switching cycles until

the control loop responds (typically 3 switching cycles).

Once the loop responds, regulation is restored and the

desired output is reached. During the period prior to PWM

operation resuming, the relationship between output

voltage and output capacitance can be approximated

using the equation

DROOP

LOAD

OUT

This equation can be used to approximate the minimum

output capacitance needed to ensure voltage does not

droop below an acceptable level. For example, a load step

from 50mA to 400mA requiring droop less than 50mV

would require the minimum output capacitance to be

OUT

In this example, using a standard 10µF capacitor would be

adequate to keep voltage droop less than the desired

limit. Note that if the voltage droop limit were decreased

from 50mV to 25mV, the output capacitance would need

to be increased to at least 12µF (twice as much capaci-

tance for half the droop). Capacitance will decrease from

the nominal value when a ceramic capacitor is biased with

a DC current, so it is important to select a capacitor whose

Applications Information (continued)

Manufacturer/Part No.

(μH)

DCR

Max

(Ω)

Rated

Current

(A)

L at Rated

Current

(μH)

Dimensions

LxWxH

(mm)

Murata

LQM2HPN1R0

1±20%

0.13

1.5

0.78

2.5x2.0x1.2

Murata

LQH3NPN1R0

1±20%

0.07

1.7

0.78

3.0x3.0x1.5

Coilcraft

LPO4815

1±20%

0.036

1.9

0.8

4.8x4.8x1.5

Coilcraft

LPS3010

1±20%

0.085

1.6

0.7

3.0x3.0x1.0

shielded

FDK

MIPWT3226D1R5

1.5±30%

0.09

1.2

0.9

3.2x2.6x0.8

FDK

MIPF2520D1R5

1.5±30%

0.07

1.5

0.9

3.2x2.6x0.8

Tayo Yuden

CKP32161R5M

1.5±20%

0.13

0.5

3.2x1.6x0.8

value exceeds the necessary capacitance value at the pro-

grammed output voltage. Check the manufacturer’s

capacitance vs. DC voltage graphs when selecting an

output capacitor to ensure the capacitance will be

adequate.

Table 2 lists the manufacturers of recommended output

capacitor options.

Table 2 — Recommended Output Capacitors

Manufacturer

Part Nunber

Value

(μF)

Type

Rated

Voltage

(VDC)

Dimensions

LxWxH (mm)

Case Size

Murata

GRM188R60J106ME47D

10±20%

X5R

6.3

1.6x0.8x0.8

0603

Murata

GRM21BR60J106K

10±10%

X5R

6.3

2.0x1.25x1.25

0805

TaiyoYuden

JMK107BJ106MA-T

10±20%

X5R

6.3

1.6x0.8x0.8

0603

TDK

C1608X5R0J106MT

10±20%

X5R

6.3

1.6x0.8x0.8

0603

IN Selection

The SC202 input source current will appear as a DC supply

current with a triangular ripple imposed on it. To prevent

large input voltage ripple, a low ESR ceramic capacitor is

required. A minimum value of 4.7μF should be used. It is

important to consider the DC voltage coefficient charac-

teristics when determining the actual required value. For

example, a 10μF, 6.3V, X5R ceramic capacitor with 5V DC

applied may exhibit a capacitance as low as 4.5μF. The

value of required input capacitance is estimated by deter-

mining the acceptable input ripple voltage and calculating

the minimum value required for C

IN using the equation

ESR

OUT

The input voltage ripple is at maximum level when the

input voltage is twice the output voltage (50% duty cycle

scenario).

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