FS6370 datasheet(13/28 Pages) ONSEMI

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FS6370

Table 4: Power-Down Bits

Name

Description

Power-Down PLL A

Bit = 0

Power on

PDPLL_A

(Bit 21)

Bit = 1

Power off

Power-Down PLL B

Bit = 0

Power on

PDPLL_B

(Bit 45)

Bit = 1

Power off

Power-Doan PLL C

Bit = 0

Power on

PDPLL_C

(Bit 69)

Bit = 1

Power off

Reserved (0)

(Bit 69)

Power-Down POST Divider A

Bit = 0

Power on

PDPOST_A

(Bit 120)

Bit = 1

Power off

Power-Down POST Divider B

Bit = 0

Power on

PDPOST_B

(Bit 121)

Bit = 1

Power off

Power-Down POST Divider C

Bit = 0

Power on

PDPOSTC

(Bit 122)

Bit = 1

Power off

Power-Down POST Divider D

Bit = 0

Power on

PDPOSTD

(Bit 123)

Bit = 1

Power off

Table 5: Divider Control Bits

Name

Description

REFDIV_A[7:0]

(Bits 7-0)

Reference Divider A (NR)

REFDIV_B[7:0]

(Bits 31-24)

Reference Divider B (NR)

REFDIV_C1[7:0]

(Bits 55-48)

Reference Divider C1 (NR)

selected when the SEL-CD pin = 0

REFDIV_C2[7:0]

(Bits 79-72)

Reference Divider C2 (NR)

selected when the SEL-CD pin = 1

Feedback Divider A (NF)

FBKDIV_A[2:0]

A-Counter value

FBKDIV_A[10:0]

(Bits 18-8)

FBKDIV_A[10:3]

M-Counter value

Feedback Divider B (NF)

FBKDIV_B[2:0]

A-Counter value

FBKDIV_B[10:0]

(Bits 42-32)

FBKDIV_B[10:3]

M-Counter value

Feedback Divider C1 (NF)

selected when the SEL-CD pin = 0

FBKDIV_C1[2:0]

A-Counter value

FBKDIV_C1[10:0]

(Bits 66-56)

FBKDIV_C1[10:3]

M-Counter value

Feedback Divider C2 (NF)

selected when the SEL-CD pin = 1

FBKDIV_C2[2:0]

A-Counter value

FBKDIV_C2[10:0]

(Bits 90-80)

FBKDIV_C2[10:3]

M-Counter value

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