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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 864 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 864 Page - Freescale Semiconductor, Inc |
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864 / 1348 page  Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2) MC9S12XDP512 Data Sheet, Rev. 2.21 866 Freescale Semiconductor 22.3.2.53 Port H Interrupt Flag Register (PIFH) Read: Anytime. Write: Anytime. Each flag is set by an active edge on the associated input pin. This could be a rising or a falling edge based on the state of the PPSH register. To clear this flag, write logic level “1” to the corresponding bit in the PIFH register. Writing a “0” has no effect. 76543210 R PIFH7 PIFH6 PIFH5 PIFH4 PIFH3 PIFH2 PIFH1 PIFH0 W Reset 00000000 Figure 22-55. Port H Interrupt Flag Register (PIFH) Table 22-50. PIFH Field Descriptions Field Description 7–0 PIFH[7:0] Interrupt Flags Port H 0 No active edge pending. Writing a “0” has no effect. 1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set). Writing a logic level “1” clears the associated flag. |
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