SC312XDP512F0MPVR datasheet(691/1348 Pages) FREESCALE

691 / 1348 page

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

693

Chapter 19

S12X Debug (S12XDBGV2) Module

19.1

Introduction

The DBG module provides an on-chip trace buffer with ﬂexible triggering capability to allow non-intrusive

debug of application software. The DBG module is optimized for the HCS12X 16-bit architecture and

allows debugging of both CPU and XGATE module operations.

Typically the DBG module is used in conjunction with the BDM module, whereby the user conﬁgures the

DBG module for a debugging session over the BDM interface. Once conﬁgured the DBG module is armed

and the device leaves BDM mode returning control to the user program, which is then monitored by the

DBG module. Alternatively, the DBG module can be conﬁgured over a serial interface using SWI routines.

Comparators monitor the bus activity of the CPU and XGATE modules. When a match occurs, the control

logic can trigger the state sequencer to a new state or tag an opcode. A tag hit, which occurs when the

tagged opcode reaches the execution stage of the instruction queue, can also cause a state transition.

On a transition to the ﬁnal state, bus tracing is triggered and/or a breakpoint can be generated. Independent

of comparator matches, a transition to ﬁnal state with associated tracing and breakpoint can be triggered

by the external TAGHI and TAGLO signals. This is done by an XGATE module S/W breakpoint request

or by writing to the TRIG control bit.

The trace buffer is visible through a 2-byte window in the register address map and can be read out using

standard 16-bit word reads. Tracing is disabled when the MCU system is secured.

19.1.1

Glossary of Terms

COF: Change Of Flow. Change in the program ﬂow due to a conditional branch, indexed jump or interrupt.

BDM : Background Debug Mode

DUG: Device User Guide, describing the features of the device into which the DBG is integrated.

WORD: 16 bit data entity

Data Line : 64 bit data entity

XGATE : S12X family programmable Direct Memory Access Module

CPU : S12X_CPU module

Tag : Tags can be attached to XGATE or CPU opcodes as they enter the instruction pipe. If the tagged

opcode reaches the execution stage a tag hit occurs.

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