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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 625 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 625 Page - Freescale Semiconductor, Inc |
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625 / 1348 page  Chapter 17 Memory Mapping Control (S12XMMCV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 625 Figure 17-12. RPAGE Address Mapping NOTE Because RAM page 0 has the same global address as the register space, it is possible to write to registers through the RAM space when RPAGE = $00. The reset value of $FD ensures that there is a linear RAM space available between addresses $1000 and $3FFF out of reset. The fixed 4K page from $2000–$2FFF of RAM is equivalent to page 254 (page number $FE). The fixed 4K page from $3000–$3FFF of RAM is equivalent to page 255 (page number $FF). Table 17-11. RPAGE Field Descriptions Field Description 7–0 RP[7:0] RAM Page Index Bits 7–0 — These page index bits are used to select which of the 256 RAM array pages is to be accessed in the RAM Page Window. Bit18 Bit0 Bit11 0 Address [11:0] RPAGE Register [7:0] Global Address [22:0] Bit12 Bit19 0 Address: CPU Local Address or BDM Local Address 0 |
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