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SC312XDP512F0MPVR датащи(PDF) 318 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 318 Page - Freescale Semiconductor, Inc |
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318 / 1348 page ![]() Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2) MC9S12XDP512 Data Sheet, Rev. 2.21 318 Freescale Semiconductor 7.3.2.1 Timer Input Capture/Output Compare Select Register (TIOS) Read or write: Anytime All bits reset to zero. TC1H (High) R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 W TC1H (Low) R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0 W TC2H (High) R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 W TC2H (Low) R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0 W TC3H (High) R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 W TC3H (Low) R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0 W 76543210 R IOS7 IOS6 IOS5 IOS4 IOS3 IOS2 IOS1 IOS0 W Reset 00000000 Figure 7-3. Timer Input Capture/Output Compare Register (TIOS) Table 7-2. TIOS Field Descriptions Field Description 7:0 IOS[7:0] Input Capture or Output Compare Channel Configuration 0 The corresponding channel acts as an input capture. 1 The corresponding channel acts as an output compare. Register Name Bit 7 65432 1 Bit 0 = Unimplemented or Reserved Figure 7-2. ECT Register Summary (Sheet 5 of 5) |
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