LTC4280CUFD datasheet(19/28 Pages) LINER

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LTC4280

4280f

APPLICATIONS INFORMATION

For a start-up time of 4ms with a 2x safety margin we

choose:

ms μF

TIMER

STARTUP

TIMER

12 3

•

./μ

μF

≅ 068

For an overcurrent fault ﬁlter time of 5ms we choose:

CF = tFILTER/123ms/μF ≅ 47nF

The UV and OV resistor string values can be solved in the

following method. First pick R3 based on ISTRING being

1.235V/R3 at the edge of the OV rising threshold, where

ISTRING > 40μA. Then solve the following equations:

R2 =

•R3 •

OV(OFF)

UV(ON)

TH(RISING)

H(FALLING)

UV(ON)

TH(RI

–R3

R1 =

•(

)

SING)

––

In our case we choose R3 to be 3.4kΩ to give a resistor

string current below 100μA. Then solving the equations

results in R2 = 1.16kΩ and R1 = 34.6kΩ.

The FB divider is solved by picking R8 and solving for R7,

choosing 3.57kΩ for R8 we get:

R7 =

PWRGD(UP)

TH(RISING)

•

–

resulting in R7 = 30kΩ.

A 0.1μF capacitor, CF, is placed on the UV pin to prevent

supply glitches from turning off the GATE via UV or OV.

The address is set with the help of Table 1, which indicates

binary address 1010011 corresponds to address 19.

Address 19 is set by setting ADR2 high, ADR1 open and

ADR0 high.

Next the value of R5 and R6 are chosen to be the default

values 10Ω and 15k as discussed previously.

FILTER

GND

SDAO

GPIO

INTVCC

TIMER

ADIN

ADR2

ADR1

SENSE RESISTOR RS

LTC4280UFD

ILOAD

4280 F05

ILOAD

Figure 5. Recommended Layout

In addition a 0.1μF ceramic bypass capacitor is placed on

the INTVCC pin.

Layout Considerations

To achieve accurate current sensing, a Kelvin connection

is required. The minimum trace width for 1oz copper

foil is 0.02" per amp to make sure the trace stays at a

reasonable temperature. Using 0.03" per amp or wider

is recommended. Note that 1oz copper exhibits a sheet

resistance of about 530μΩ/®. Small resistances add up

quickly in high current applications. To improve noise

immunity, put the resistive dividers to the UV, OV and FB

pins close to the device and keep traces to VDD and GND

short. It is also important to put the bypass capacitor for

the INTVCC pin, C3, as close as possible between INTVCC

and GND. A 0.1μF capacitor from the UV pin (and OV pin

through resistor R2) to GND also helps reject supply noise.

Figure 4 shows a layout that addresses these issues. Note

that a surge suppressor, Z1, is placed between supply and

ground using wide traces.

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