LT1766_1 datasheet(27/30 Pages) LINER

27 / 30 page

LT1766/LT1766-5

1766fc

Note 44, pages 29 and 30. For our purposes here a fudge

factor (ff) is used. The value for ff is about 1.2 for higher

load currents and L ≥15μH. It increases to about 2.0 for

smaller inductors at lower load currents.

Input Capacitor I

ff I

RMS

OUT

= ()(

)

ff = 1.2 to 2.0

The output capacitor ripple current for the positive-to-

negative converter is similar to that for a typical buck

regulator—it is a triangular waveform with peak-to-peak

value equal to the peak-to-peak triangular waveform of the

inductor. The low output ripple design in Figure 15 places

the input capacitor between VIN and the regulated negative

output. This placement of the input capacitor signiﬁcantly

reduces the size required for the output capacitor (versus

placing the input capacitor between VIN and ground).

The peak-to-peak ripple current in both the inductor and

output capacitor (assuming continuous mode) is:

IP-P

P-P

DC V

DC Duty Cycle

RMS

OUT

COUT

•

()

The output ripple voltage for this conﬁguration is as low

as the typical buck regulator based predominantly on the

inductor’s triangular peak-to-peak ripple current and the

ESR of the chosen capacitor (see Output Ripple Voltage

in Applications Information).

Diode Current

Average diode current is equal to load current. Peak diode

current will be considerably higher.

Peak diode current:

Continuous Mode

Lf V

Discontinuous Mode

OUT

()

(

)(

)

()( )(

)

()(

)

()( )

Keep in mind that during start-up and output overloads,

average diode current may be much higher than with nor-

mal loads. Care should be used if diodes rated less than

1A are used, especially if continuous overload conditions

must be tolerated.

BOOST Pin Voltage

To ensure that the BOOST pin voltage does not exceed its

absolute maximum rating of 68V with respect to device

GND pin voltage, care should be taken in the generation of

boost voltage. For the conventional method of generating

boost voltage, shown in Figure 1, the voltage at the BOOST

pin during switch on time is approximately given by:

VBOOST (GND pin) = (VIN – VGNDPIN) + VC2

where:

VC2 = (D2+) – VD2 – (D1+) + VD1

= voltage across the boost capacitor

For the positive-to-negative converter shown in Figure 15,

the conventional Buck output node is grounded (D2+) = 0V

and the catch diode (D1+) is connected to the negative

output = VOUT = –12V. Absolute maximum ratings should

also be observed with the GND pin now at –12V. It can be

seen that for VD1 = VD2:

VC2 = (D2+) – (D1+) = |VOUT| = 12V

The maximum VIN voltage allowed for the device (GND

pin at –12V) is 48V.

The maximum VIN voltage allowed without exceeding the

BOOST pin voltage absolute maximum rating is given by:

VIN(MAX) = Boost (Max) + (VGNDPIN) – VC2

VIN(MAX) = 68 + (–12) – 12 = 44V

To increase usable VIN voltage, VC2 must be reduced. This

can be achieved by placing a zener diode VZ1 (anode at

C2+) in series with D2.

Note: A maximum limit on VZ1 must be observed to

ensure a minimum VC2 is maintained on the boost

capacitor; referred to as VBOOST(MIN) in the Electrical

Characteristics.

APPLICATIONS INFORMATION

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