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MSB

LSB

MSB

LSB

M S B

LSB

MSB

LSB

LSB

MSB

LSB

MSB

LRCK

BCK

DATA0

DATA1

LRCK

BCK

DATA0

DATA1

LRCK

BCK

DATA0

DATA1

(a) Left−Justified Data Format

(b) Right−Justified Data Format

1/f

S

Ch. 1 (DATA0) or Ch. 3 (DATA1)

Ch. 2 (DATA0) or Ch. 4 (DATA1)

PCM4104-EP

SBAS419 – JUNE 2007

The LRCK pin functions as either the left/right word clock or the frame synchronization clock, depending upon

the data format selected. The LRCK frequency is equal to the input sampling frequency (44.1 kHz, 48 kHz, 96

kHz, etc.).

The BCK pin functions as the serial data clock input. This input is referred to as the bit clock. The bit clock runs

at an integer multiple of the input sampling frequency. Typical multiples include 32, 48, 64, 96, 128, 192, and

256, depending upon the data format, word length, and system clock frequency selected.

formats, the DATA0 pin carries the audio data for channels 1 and 2, while the DATA1 pin carries the audio data

for channels 3 and 4. When using TDM data formats, DATA0 carries the audio data for all four channels, while

the DATA1 input is ignored.

The audio serial port data formats are shown in Figure 10, Figure 13, and Figure 14. Data formats are selected

by using the FMT[2:0] bits in Control Register 7 in Software mode, or by using the FMT0 (pin 25), FMT1 (pin

26), and FMT2 (pin 27) inputs in Standalone mode. In Software mode, the user may also select the phase

(normal or inverted) for the LRCK input, as well as the data sampling edge for the BCK input (either rising or

falling edge). The reset default conditions for the Software mode are normal phase for LRCK and rising edge

data sampling for BCK.

justification and word length. The PCM audio data must be two's complement binary, MSB first. Figure 10

provides illustrations for these data formats.

The TDM formats carry the information for four or eight channels on a single data line. The DATA0 input (pin 17)

is used as the data input for the TDM formats. The data is carried in a time division multiplexed fashion; hence,

the TDM acronym used to describe this format. Figure 12 shows the TDM connection of two PCM4104 devices.

The data for each channel is assigned one of the time slots in the TDM frame, as shown in Figure 13 and

Figure 14. The sub-frame assignment for each PCM4104 is determined by the state of the SUB input (pin 13).

When SUB is forced low, the device is assigned to sub-frame 0. When SUB is forced high, the device is

assigned to sub-frame 1.

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