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PIC18F4580-E/ML датащи(PDF) 137 Page - Microchip Technology |
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PIC18F4580-E/ML датащи(HTML) 137 Page - Microchip Technology |
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137 / 490 page ![]() © 2009 Microchip Technology Inc. DS39637D-page 137 PIC18F2480/2580/4480/4580 TABLE 11-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on Page: PORTA RA7(1) RA6(1) RA5 RA4 RA3 RA2 RA1 RA0 58 LATA LATA7(1) LATA6(1) LATA Output Latch Register 58 TRISA TRISA7(1) TRISA6(1) PORTA Data Direction Register 58 ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 56 CVRCON(2) CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 57 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA. Note 1: RA<7:6> and their associated latch and data direction bits are enabled as I/O pins based on oscillator configuration; otherwise, they are read as ‘0’. 2: These registers are unimplemented on PIC18F2X80 devices. |
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