PIC18F4580-ESLASHML datasheet(94/490 Pages) MICROCHIP

94 / 490 page

PIC18F2480/2580/4480/4580

DS39637D-page 94

6.3.5

STATUS REGISTER

The STATUS register, shown in Register 6-2, contains

the arithmetic status of the ALU. As with any other SFR,

it can be the operand for any instruction.

If the STATUS register is the destination for an instruc-

tion that affects the Z, DC, C, OV or N bits, the results

of the instruction are not written; instead, the status is

updated according to the instruction performed. There-

fore, the result of an instruction with the STATUS

intended. As an example, CLRF STATUS will set the Z

bit and leave the remaining Status bits unchanged

(‘000u u1uu’).

It is recommended that only BCF, BSF, SWAPF, MOVFF

and MOVWF instructions are used to alter the STATUS

C, DC, OV or N bits in the STATUS register.

For other instructions that do not affect Status bits, see

the instruction set summaries in Table 26-2 and

Table 26-3.

Note:

The C and DC bits operate as the borrow

and digit borrow bits respectively in

subtraction.

STATUS REGISTER

U-0

R/W-x

—

—N

DC(1)

C(2)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-5

Unimplemented: Read as ‘0’

bit 4

N: Negative bit

This bit is used for signed arithmetic (2’s complement). It indicates whether the result was negative

(ALU MSB = 1).

1 = Result was negative

0 = Result was positive

bit 3

OV: Overflow bit

This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit magnitude

which causes the sign bit (bit 7) to change state.

1 = Overflow occurred for signed arithmetic (in this arithmetic operation)

0 = No overflow occurred

bit 2

Z: Zero bit

1 = The result of an arithmetic or logic operation is zero

0 = The result of an arithmetic or logic operation is not zero

bit 1

DC: Digit carry/borrow bit(1)

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

1 = A carry-out from the 4th low-order bit of the result occurred

0 = No carry-out from the 4th low-order bit of the result

bit 0

C: Carry/borrow bit(2)

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

1 = A carry-out from the Most Significant bit of the result occurred

0 = No carry-out from the Most Significant bit of the result occurred

Note 1:

For borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the

second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the bit 4 or bit 3 of the

source register.

For borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the

second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order bit of

the source register.

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