PIC16F1824-ESLASHML datasheet(41/420 Pages) MICROCHIP

41 / 420 page

 2010 Microchip Technology Inc.

Preliminary

DS41419A-page 41

PIC16F/LF1824/1828

Bank 8

400h(1)

INDF0

Addressing this location uses contents of FSR0H/FSR0L to address data memory

(not a physical register)

xxxx xxxx xxxx xxxx

401h(1)

INDF1

Addressing this location uses contents of FSR1H/FSR1L to address data memory

(not a physical register)

xxxx xxxx xxxx xxxx

402h(1)

PCL

Program Counter (PC) Least Significant Byte

0000 0000 0000 0000

403h(1)

STATUS

—

—TO

ZDC

---1 1000 ---q quuu

404h(1)

FSR0L

Indirect Data Memory Address 0 Low Pointer

0000 0000 uuuu uuuu

405h(1)

FSR0H

Indirect Data Memory Address 0 High Pointer

0000 0000 0000 0000

406h(1)

FSR1L

Indirect Data Memory Address 1 Low Pointer

0000 0000 uuuu uuuu

407h(1)

FSR1H

Indirect Data Memory Address 1 High Pointer

0000 0000 0000 0000

408h(1)

BSR

—

BSR<4:0>

---0 0000 ---0 0000

409h(1)

WREG

Working Register

0000 0000 uuuu uuuu

40Ah(1)

PCLATH

—

Write Buffer for the upper 7 bits of the Program Counter

-000 0000 -000 0000

40Bh(1)

INTCON

GIE

PEIE

TMR0IE

INTE

IOCIE

TMR0IF

INTF

IOCIF

0000 000x 0000 000u

40Ch

—

Unimplemented

—

40Dh

—

Unimplemented

—

40Eh

—

Unimplemented

—

40Fh

—

Unimplemented

—

410h

—

Unimplemented

—

411h

—

Unimplemented

—

412h

—

Unimplemented

—

413h

—

Unimplemented

—

414h

—

Unimplemented

—

415h

TMR4

Timer4 Module Register

0000 0000 0000 0000

416h

PR4

Timer4 Period Register

1111 1111 1111 1111

417h

T4CON

—

T4OUTPS<3:0>

TMR4ON

T4CKPS<1:0>

-000 0000 -000 0000

418h

—

Unimplemented

—

419h

—

Unimplemented

—

41Ah

—

Unimplemented

—

41Bh

—

Unimplemented

—

41Ch

TMR6

Timer6 Module Register

0000 0000 0000 0000

41Dh

PR6

Timer6 Period Register

1111 1111 1111 1111

41Eh

T6CON

—

T6OUTPS<3:0>

TMR6ON

T6CKPS<1:0>

-000 0000 -000 0000

41Fh

—

Unimplemented

—

TABLE 3-8:

SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on all

other

resets

Legend:

x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.

Shaded locations are unimplemented, read as ‘0’.

Note

1: These registers can be addressed from any bank.

2: PIC16F/LF1828 only.

3: PIC16F/LF1824 only.

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