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SC68C752B датащи(PDF) 32 Page - NXP Semiconductors

номер детали SC68C752B
подробное описание детали  5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and 68 mode 關P interface
PDF  48 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC68C752B датащи(HTML) 32 Page - NXP Semiconductors

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SC68C752B_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 20 January 2010
32 of 48
NXP Semiconductors
SC68C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
[1]
× sign here means bit-AND.
Set TX FIFO and RX FIFO thresholds
to VALUE
read LCR (03h), save in temp1
set LCR (03h) to BFh
read EFR (02h), save in temp2
set EFR (02h) to 10h + temp2
set LCR (03h) to 00h
read MCR (04h), save in temp3
set MCR (04h) to 40h + temp3
set TLR (07h) to VALUE
set MCR (04h) to temp3
set LCR (03h) to BFh
set EFR (02h) to temp2
set LCR (03h) to temp1
Read FIFO Rdy register
read MCR (04h), save in temp1
set temp2 = temp1
× EFh [1]
set MCR (04h) = 40h + temp2
read FFR (07h), save in temp2
pass temp2 back to host
set MCR (04h) to temp1
Set prescaler value to divide-by-1
read LCR (03h), save in temp1
set LCR (03h) to BFh
read EFR (02h), save in temp2
set EFR (02h) to 10h + temp2
set LCR (03h) to 00h
read MCR (04h), save in temp3
set MCR (04h) to temp3
× 7Fh[1]
set LCR (03h) to BFh
set EFR (02h) to temp2
set LCR (03h) to temp1
Set prescaler value to divide-by-4
read LCR (03h), save in temp1
set LCR (03h) to BFh
read EFR (02h), save in temp2
set EFR (02h) to 10h + temp2
set LCR (03h) to 00h
read MCR (04h), save in temp3
set MCR (04h) to temp3 + 80h
set LCR (03h) to BFh
set EFR (02h) to temp2
set LCR (03h) to temp1
Table 24.
Register programming guide …continued
Command
Actions



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