CS8415A-CSZ datasheet(39/46 Pages) CIRRUS

39 / 46 page

DS470F4

CS8415A

A flowchart for reading the E buffer is shown in Figure 17. Since a D-to-E interrupt just occurred after read-

ing, there is a substantial time interval until the next D-to-E transfer (approximately 24 frames worth of time).

This is usually plenty of time to access the E data without having to inhibit the next transfer.

14.2.1

Reserving the First 5 Bytes in the E Buffer

D-to-E buffer transfers periodically overwrite the data stored in the E buffer. The CS8415A has the capa-

bility of reserving the first 5 bytes of the E buffer for user writes only. When this capability is in use, internal

D-to-E buffer transfers will NOT affect the first 5 bytes of the E buffer. Therefore, the user can set values

in these first 5 E bytes once, and the settings will persist until the next user change. This mode is enabled

using the Channel Status Data Buffer Control register.

14.2.2

Serial Copy Management System (SCMS)

In software mode, the CS8415A allows read access to all the channel status bits. For consumer mode

SCMS compliance, the host microcontroller needs to read and interpret the Category Code, Copy bit and

L bit appropriately.

In hardware mode, the SCMS protocol can be followed by either using the COPY and ORIG output pins,

or by using the C bit serial output pin. These options are documented in the hardware mode section of

this data sheet.

14.2.3

Channel Status Data E Buffer Access

The E buffer is organized as 24 x 16-bit words. For each word the MS Byte is the A channel data, and the

LS Byte is the B channel data (see Figure 16).

There are two methods of accessing this memory, known as one byte mode and two byte mode. The de-

sired mode is selected by setting a control register bit.

14.2.3.1 One-Byte Mode

In many applications, the channel status blocks for the A and B channels will be identical. In this situation,

if the user reads a byte from one of the channel's blocks, the corresponding byte for the other channel will

be the same. One byte mode takes advantage of the often identical nature of A and B channel status data.

When reading data in one byte mode, a single byte is returned, which can be from channel A or B data,

depending on a register control bit.

D to E interrupt occurs

Optionally set D to E inhibit

Read E data

If set, clear D to E inhibit

Return

Figure 17. Flowchart for Reading the E Buffer

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