SS8017 datasheet(9/16 Pages) SSC

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SS8017

Rev.2.01 6/06/2003

Ensuring a Valid Reset Output Down to VCC = 0V

When VCC falls below 1V, the SS8017 RESET out-

put no longer sinks current-it becomes an open cir-

cuit. Therefore, high-impedance CMOS logic inputs

connected to RESET can drift to undetermined volt-

ages.

This presents no problem in most applications, since

most µP and other circuitry is inoperative with VCC

below 1V. However, in applications where RESET

must be valid down to 0V, adding a pull-down resistor

to RESET causes any stray leakage currents to flow

to ground, holding RESET low (Figure 3). R1's value

is not critical; 100k

Ω is large enough not to load

RESET

and small enough to pull RESET to ground.

Interfacing to µPs with Bi-directional Reset Pins

A µP with bi-directional reset pins (such as the Mo-

torola 68HC11 series) can connect to the SS8017

reset

output.

If,

for

example,

the

SS8017

RESET

output is asserted high and the µP wants to

pull it low, indeterminate logic levels may result. To

correct this, connect a 4.7k

Ω resistor between the

SS8017 RESET output and the µP reset I/O (Figure

4). Buffer the SS8017 RESET output to other sys-

tem components.

Benefits of Highly Accurate Reset Threshold

Most µP supervisor Ics have reset threshold voltages

between 5% and 10% below the value of nominal

supply voltages. This ensures a reset will not occur

within 5% of the nominal supply, but will occur when

the supply is 10% below nominal.

When using ICs rated at only the nominal supply

±5% this leaves a zone of uncertainty where the sup-

ply is between 5% and 10% low, and where the reset

may or may not be asserted.

The SS8017 uses highly accurate circuitry to en-

sure that reset is asserted close to the 5% limit,

and long before the supply has declined to 10%

below nominal.

SMBus Digital Interface

From a software perspective, the SS8017 appears as

a set of byte-wide registers that contain temperature

data, alarm threshold values, fan speed data, or con-

trol bits, A standard SMBus 2-wire serial interface is

used to read temperature data and write control bits

and alarm threshold data. Each A/D and fan control

channel within the device responds to the same

SMBus slave address for normal reads and writes.

The SS8017 employs four standard SMBus protocols:

Write Byte, Read Byte, Send Byte, and Receive

Byte (Figure 5). The shorter Receive Byte protocol

allows quicker transfers, provided that the correct

data register was previously selected by a Read Byte

instruction. Use caution with the shorter protocols in

multi-master systems, since a second master could

over-write the command byte without informing the

first master.

The temperature data format is 7bits plus sign in

twos-complement form for each channel, with each

data bit representing 1°C (Table3), transmitted MSB

first. Measurements are offset by +1/2°C to minimize

internal rounding errors; for example, +99.6°C is re-

ported as +100°C.

Fig 4. Interfacing to µPs with Bi-directional Reset

I/O

Fig 3. RESET Valid to VCC = Ground Circuit

RESET

GND

100k

SS8017

RESET

GND

100k

RESET

GND

BUFFER

RESET

GND

µP

4.7k

BUFFERED RESET

TO OTHER SYSTEM

COMPONENTS

SS8017

RESET

GND

BUFFER

RESET

GND

µP

4.7k

BUFFERED RESET

TO OTHER SYSTEM

COMPONENTS

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