PIC12F615 datasheet(69/212 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS41302D-page 69

PIC12F609/615/617/12HV609/615

9.3

Comparator Control

The comparator has two control and Configuration

registers: CMCON0 and CMCON1. The CMCON1

Timer1 and simultaneously reading the comparator

output.

The CMCON0 register (Register 9-1) contain the

control and Status bits for the following:

• Enable

• Input selection

• Reference selection

•Output selection

• Output polarity

9.3.1

COMPARATOR ENABLE

Setting the CMON bit of the CMCON0 register enables

the comparator for operation. Clearing the CMON bit

disables

the

comparator

for

minimum

current

consumption.

9.3.2

COMPARATOR INPUT SELECTION

The CMCH bit of the CMCON0 register directs one of

four analog input pins to the comparator inverting input.

9.3.3

COMPARATOR REFERENCE

SELECTION

Setting the CMR bit of the CMxCON0 register directs

an internal voltage reference or an analog input pin to

the non-inverting input of the comparator. See

Section 9.10 “Comparator Voltage Reference” for

more information on the internal voltage reference

module.

9.3.4

COMPARATOR OUTPUT

SELECTION

The output of the comparator can be monitored by

reading either the COUT bit of the CMCON0 register. In

order to make the output available for an external

connection, the following conditions must be true:

• CMOE bit of the CMxCON0 register must be set

• Corresponding TRIS bit must be cleared

• CMON bit of the CMCON0 register must be set.

9.3.5

COMPARATOR OUTPUT POLARITY

Inverting the output of the comparator is functionally

equivalent to swapping the comparator inputs. The

polarity of the comparator output can be inverted by

setting the CMPOL bit of the CMCON0 register. Clear-

ing CMPOL results in a non-inverted output. A com-

plete table showing the output state versus input

conditions and the polarity bit is shown in Table 9-1.

TABLE 9-1:

OUTPUT STATE VS. INPUT

CONDITIONS

9.4

Comparator Response Time

The comparator output is indeterminate for a period of

time after the change of an input source or the selection

of a new reference voltage. This period is referred to as

the response time. The response time of the compara-

tor differs from the settling time of the voltage refer-

ence. Therefore, both of these times must be

considered when determining the total response time

to a comparator input change. See Section 16.0

“Electrical Specifications” for more details.

Note:

To use CIN+ and CIN- pins as analog

inputs, the appropriate bits must be set in

the ANSEL register and the corresponding

TRIS bits must also be set to disable the

output drivers.

Note 1: The CMOE bit overrides the PORT data

latch. Setting the CMON has no impact

on the port override.

2: The internal output of the comparator is

latched

with

each

instruction

cycle.

Unless

otherwise

specified,

external

outputs are not latched.

Input Conditions

CMPOL

COUT

CMVIN- > CMVIN+

CMVIN- < CMVIN+

CMVIN- > CMVIN+

CMVIN- < CMVIN+

Note:

COUT refers to both the register bit and

output pin.

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