ATmega328P datasheet(301/448 Pages) ATMEL

301 / 448 page

301

8161D–AVR–10/09

ATmega48PA/88PA/168PA/328P

27.7

Parallel Programming

27.7.1

Enter Programming Mode

The following algorithm puts the device in Parallel (High-voltage) Programming mode:

Set Prog_enable pins listed in Table 27-14 on page 300 to “0000”, RESET pin to 0V and

CC to 0V.

Apply 4.5 - 5.5V between V

CC and GND.

Ensure that V

CC reaches at least 1.8V within the next 20 µs.

Wait 20 - 60 µs, and apply 11.5 - 12.5V to RESET.

Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has been

applied to ensure the Prog_enable Signature has been latched.

Wait at least 300 µs before giving any parallel programming commands.

Exit Programming mode by power the device down or by bringing RESET pin to 0V.

If the rise time of the V

CC is unable to fulfill the requirements listed above, the following alterna-

tive algorithm can be used.

Set Prog_enable pins listed in Table 27-14 on page 300 to “0000”, RESET pin to 0V and

CC to 0V.

Apply 4.5 - 5.5V between V

CC and GND.

Monitor V

CC, and as soon as VCC reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.

Table 27-15. XA1 and XA0 Coding

XA1

XA0

Action when XTAL1 is Pulsed

Load Flash or EEPROM Address (High or low address byte determined by BS1).

Load Data (High or Low data byte for Flash determined by BS1).

Load Command

No Action, Idle

Table 27-16. Command Byte Bit Coding

Command Byte

Command Executed

1000 0000

Chip Erase

0100 0000

Write Fuse bits

0010 0000

Write Lock bits

0001 0000

Write Flash

0001 0001

Write EEPROM

0000 1000

Read Signature Bytes and Calibration byte

0000 0100

Read Fuse and Lock bits

0000 0010

Read Flash

0000 0011

Read EEPROM

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