ATmega32HVB datasheet(137/273 Pages) ATMEL

137 / 273 page

137

8042A–AVR–07/09

ATmega16HVB/32HVB

When the Discharge High-current Protection is activated, the external D-FET and C-FET are dis-

abled and a Current Protection Timer is started. This timer ensures that the FETs are disabled

for at least one second. The application software must then set the DFE and CFE bits in the FET

Control and Status Register to re-enable normal operation. If the D-FET is re-enabled while the

loading of the battery still is too large, the Discharge High-current Protection will be activated

again.

24.3.5

Charge High-current Protection

If the voltage at the PPI/NNI pins is above the Charge High-current Detection level for a time lon-

ger than High-current Protection Reaction Time, the chip activates Charge High-current

Protection.

When the Charge High-current Protection is activated, the external D-FET and C-FET are dis-

abled and a Current Protection Timer is started. This timer ensures that the FETs are disabled

for at least one second. The application software must then set the DFE and CFE bits in the FET

Control and Status Register to re-enable normal operation. If the C-FET is re-enabled and the

charger continues to supply too high currents, the Charge High-current Protection will be acti-

vated again.

The Short-circuit, Over-current and High-current Protection parameters are programmable to

adapt to different types of batteries. The parameters are set by writing to I/O Registers. The

Parameter Registers can be locked after the initial configuration, prohibiting any further updates

until the next Hardware Reset.

Refer to ”Register Description for Battery Protection” on page 125 for register descriptions.

24.4

External Protection Input

The External Protection Input uses the alternate port function of the General Purpose High Vot-

lage I/O to automatically disabling the external Charge and Discharge-FET. For details, see

”High Voltage I/O Ports” on page 62.

Using this together with the External Interrupt (see ”External Interrupt Characteristics” on page

233) features a highly flexible solution for the customer and it allows the user to customize an

external protection scheme suitable for battery applications.

The External Protection Input disables both the C-FET and D-FET immediately when the voltage

on EXTPROT pin is pulled high (logic ‘1’). It is also used to disable DUVR mode if DUVR mode

is enabled. Note that, unlike a Battery Protection event, the External Protection input does not

affect the status of the FCSR (CFE, DFE, DUVRD, and CPS) bits. When the ‘high’ condition dis-

appears, the FET disabling is released immediately. DUVR mode is automatically re-entered if

previously enabled.

The feature is automatically enabled when the chip starts up, and can be disabled before locking

the BPCR register. When locking the BPCR register, the External Protection feature is also

locked.

When External Protection Input is enabled, an override enable signal is set to EXTPROT pin

configuring the pin as digital input. The port may be set up to give an interrupt when the pin

value changes, and the protection status can be read from the port register.

Note that the External Protection Input is default enabled. This means that after reset (and dur-

ing reset) the port is default overridden to digital input, independent of the port register setting.

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