ATmega325P datasheet(207/364 Pages) ATMEL

207 / 364 page

207

8023F–AVR–07/09

ATmega325P/3250P

Figure 21-1. Analog to Digital Converter Block Schematic

21.3

Operation

The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-

mation. The minimum value represents GND and the maximum value represents the voltage on

the AREF pin minus 1 LSB. Optionally, AVCC or an internal 1.1V reference voltage may be con-

nected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal

voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve

noise immunity.

The analog input channel is selected by writing to the MUX bits in ADMUX. Any of the ADC input

pins, as well as GND and a fixed bandgap voltage reference, can be selected as single ended

inputs to the ADC. The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA. Volt-

age reference and input channel selections will not go into effect until ADEN is set. The ADC

does not consume power when ADEN is cleared, so it is recommended to switch off the ADC

before entering power saving sleep modes.

The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and

ADCL. By default, the result is presented right adjusted, but can optionally be presented left

adjusted by setting the ADLAR bit in ADMUX.

ADC CONVERSION

COMPLETE IRQ

8-BIT DATA BUS

ADC MULTIPLEXER

SELECT (ADMUX)

ADC CTRL. & STATUS

ADC DATA REGISTER

(ADCH/ADCL)

CONVERSION LOGIC

10-BIT DAC

SAMPLE & HOLD

COMPARATOR

INTERNAL

REFERENCE

MUX DECODER

AVCC

ADC7

ADC6

ADC5

ADC4

ADC3

ADC2

ADC1

ADC0

ADC MULTIPLEXER

OUTPUT

DIFFERENTIAL

AMPLIFIER

AREF

BANDGAP

REFERENCE

PRESCALER

SINGLE ENDED / DIFFERENTIAL SELECTION

GND

POS.

INPUT

MUX

NEG.

INPUT

MUX

TRIGGER

SELECT

ADTS[2:0]

INTERRUPT

FLAGS

START

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