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ATtiny87-15XZ датащи(PDF) 34 Page - ATMEL Corporation

номер детали ATtiny87-15XZ
подробное описание детали  8-bit Microcontroller with 8K/16K Bytes In-System Programmable Flash and LIN Controller
PDF  282 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny87-15XZ датащи(HTML) 34 Page - ATMEL Corporation

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34
7728D–AVR–07/09
ATtiny87/ATtiny167
It is strongly recommended to run this sequence only once the interrupts have been disabled.
The user (code) is responsible for the correct implementation of the clock switching sequence.
Here is a “light” C-code that describes such a sequence of commands.
Warning:
In the ATtiny87/167, only one among the three external clock sources can be enabled at a
given time. Moreover, the enables of the external clock and of the external low-frequency
oscillator are shared with the asynchronous timer.
4.3.8
Clock Monitoring
A safe system needs to monitor its clock sources. Two domains need to be monitored:
- Clock sources for peripherals,
- Clocks sources for system clock generation.
C Code Example
void ClockSwiching (unsigned char clk
_number, unsigned char sut) {
#define CLOCK
_RECOVER
0x05
#define CLOCK
_ENABLE
0x02
#define CLOCK
_SWITCH
0x04
#define CLOCK
_DISABLE
0x01
unsigned char previous
_clk, temp;
// Disable interrupts
temp = SREG; asm ("cli");
// Save the current system clock source
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_RECOVER;
previous
_clk = CLKSELR & 0x0F;
// Enable the new clock source
CLKSELR = ((sut << 4 ) & 0x30) | (clk
_number & 0x0F);
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_ENABLE;
// Wait for clock validity
while ((CLKCSR & (1 << CLKRDY)) == 0);
// Switch clock source
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_SWITCH;
// Wait for effective switching
while (1){
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_RECOVER;
if ((CLKSELR & 0x0F) == (clk
_number & 0x0F)) break;
}
// Shut down unneeded clock source
if (previous_clk != (clk_number & 0x0F)) {
CLKSELR = previous
_clk;
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_DISABLE;
}
// Re-enable interrupts
SREG = temp;
}



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