ATmega165 datasheet(135/336 Pages) ATMEL

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ATmega165/V

2573G–AVR–07/09

Asynchronous Operation of

Timer/Counter2

When Timer/Counter2 operates asynchronously, some considerations must be taken.

•

Warning: When switching between asynchronous and synchronous clocking of

Timer/Counter2, the Timer Registers TCNT2, OCR2A, and TCCR2A might be

corrupted. A safe procedure for switching clock source is:

1.Disable the Timer/Counter2 interrupts by clearing OCIE2A and TOIE2.

2.Select clock source by setting AS2 as appropriate.

3.Write new values to TCNT2, OCR2A, and TCCR2A.

4.To switch to asynchronous operation: Wait for TCN2UB, OCR2UB, and

TCR2UB.

5.Clear the Timer/Counter2 Interrupt Flags.

6.Enable interrupts, if needed.

•

The CPU main clock frequency must be more than four times the Oscillator

frequency.

•

When writing to one of the registers TCNT2, OCR2A, or TCCR2A, the value is

transferred to a temporary register, and latched after two positive edges on TOSC1.

The user should not write a new value before the contents of the temporary register

have been transferred to its destination. Each of the three mentioned registers have

their individual temporary register, which means that e.g. writing to TCNT2 does not

disturb an OCR2A write in progress. To detect that a transfer to the destination

implemented.

•

When entering Power-save or ADC Noise Reduction mode after having written to

TCNT2, OCR2A, or TCCR2A, the user must wait until the written register has been

updated if Timer/Counter2 is used to wake up the device. Otherwise, the MCU will

enter sleep mode before the changes are effective. This is particularly important if

the Output Compare2 interrupt is used to wake up the device, since the Output

Compare function is disabled during writing to OCR2A or TCNT2. If the write cycle

is not finished, and the MCU enters sleep mode before the OCR2UB bit returns to

zero, the device will never receive a compare match interrupt, and the MCU will not

wake up.

•

If Timer/Counter2 is used to wake the device up from Power-save or ADC Noise

Reduction mode, precautions must be taken if the user wants to re-enter one of

these modes: The interrupt logic needs one TOSC1 cycle to be reset. If the time

between wake-up and re-entering sleep mode is less than one TOSC1 cycle, the

interrupt will not occur, and the device will fail to wake up. If the user is in doubt

whether the time before re-entering Power-save or ADC Noise Reduction mode is

sufficient, the following algorithm can be used to ensure that one TOSC1 cycle has

elapsed:

1.Write a value to TCCR2A, TCNT2, or OCR2A.

2.Wait until the corresponding Update Busy Flag in ASSR returns to zero.

3.Enter Power-save or ADC Noise Reduction mode.

•

When the asynchronous operation is selected, the 32.768 kHz Oscillator for

Timer/Counter2 is always running, except in Power-down and Standby modes. After

a Power-up Reset or wake-up from Power-down or Standby mode, the user should

be aware of the fact that this Oscillator might take as long as one second to stabilize.

The user is advised to wait for at least one second before using Timer/Counter2

after power-up or wake-up from Power-down or Standby mode. The contents of all

Timer/Counter2 Registers must be considered lost after a wake-up from Power-

down or Standby mode due to unstable clock signal upon start-up, no matter

whether the Oscillator is in use or a clock signal is applied to the TOSC1 pin.

ATmega165 датащи(PDF) 135 Page - ATMEL Corporation

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