ICS8735-21 datasheet(1/20 Pages) IDT

номер детали	ICS8735-21

подробное описание детали	700MHz, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR

PDF	20 Pages

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производитель	IDT [Integrated Device Technology]

домашняя страница	http://www.idt.com

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700MHz, DIFFERENTIAL-TO-3.3V LVPECL

ZERO DELAY CLOCK GENERATOR

ICS8735-21

IDT™ / ICS™ 3.3V LVPECL ZERO DELAY CLOCK GENERATOR

1

ICS8735AM-21 REV. A JULY 31, 2008

General Description

The ICS8735-21 is a highly versatile 1:1 Differential-

to-3.3V LVPECL clock generator and a member of

the HiPerClockS™family of High Performance Clock

Solutions from IDT. The CLK, nCLK pair can accept

most standard differential input levels. The

ICS8735-21 has a fully integrated PLL and can be configured as

zero delay buffer, multiplier or divider, and has an output frequency

range of 31.25MHz to 700MHz. The reference divider, feedback

divider and output divider are each programmable, thereby

allowing for the following output-to-input frequency ratios: 8:1, 4:1,

2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to

achieve “zero delay” between the input clock and the output

clocks. The PLL_SEL pin can be used to bypass the PLL for

system test and debug purposes. In bypass mode, the reference

clock is routed around the PLL and into the internal output

dividers.

Features

• One differential 3.3V LVPECL output pair

One differential feedback output pair

• Differential CLK/nCLK input pair

• CLK/nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Output frequency range: 31.25MHz to 700MHz

• Input frequency range: 31.25MHz to 700MHz

• VCO range: 250MHz to 700MHz

• External feedback for “zero delay” clock regeneration

with configurable frequencies

• Programmable dividers allow for the following output-to-input

frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8

• Cycle-to-cycle jitter: 25ps (maximum)

• Static phase offset: 50ps ± 100ps

• Full 3.3V supply voltage

• 0°C to 70°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

HiPerClockS™

ICS

9

10 11 12 13 14 15 16

32 31 30

29 28

27 26 25

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

SEL0

SEL1

nc

CLK

nCLK

nc

MR

VCCO

nc

Q

nQ

QFB

nQFB

nc

VCCO

Block Diagram

PLL_SEL

CLK

nCLK

FB_IN

nFB_IN

SEL0

SEL1

SEL2

SEL3

MR

Q

nQ

QFB

nQFB

PLL

8:1, 4:1, 2:1, 1:1,

1:2, 1:4, 1:8

0

1

÷1, ÷2, ÷4, ÷8,

÷16, ÷32, ÷64

Pullup

Pulldown

Pullup

Pulldown

Pullup

Pulldown

Pin Assignments

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

nQFB

VEE

SEL2

FB_IN

nFB_IN

VCC

MR

nCLK

CLK

QFB

nc

SEL1

SEL0

VCC

PLL_SEL

VCCA

SEL3

VCCO

Q

nQ

ICS8735-21

20-Lead SOIC

7.5mm x 12.8mm x 2.3mm package body

M Package

Top View

ICS8735-21

32-Lead VFQFN

5mm x 5mm x 0.925mm

package body

K Package

Top View

Аналогичный номер детали - ICS8735-21

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List of Unclassifed Man...	ICS8735-21	198Kb / 15P	700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR

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Аналогичное описание - ICS8735-21

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List of Unclassifed Man...	ICS8735-21	198Kb / 15P	700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR
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	8735BI-01	610Kb / 22P	1:5, Differential-to-3.3V LVPECL Zero Delay Clock Generator January 27, 2016
	8735BI-21	635Kb / 19P	700MHz, Differential-to-3.3V LVPECL Zero Delay Clock Generator 1/27/15
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