ICS8735-21

700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR

IDT™ / ICS™ 3.3V LVPECL ZERO DELAY CLOCK GENERATOR

16

ICS8735AM-21 REV. A JULY 31, 2008

3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.

LVPECL output driver circuit and termination are shown in Figure 7.

Figure 7. LVPECL Driver Circuit and Termination

•

•

Pd_H is power dissipation when the output drives high.

Pd_L is the power dissipation when the output drives low.

[(2V – 0.9V)/50

Ω] * 0.9V = 19.8mW

[(2V – 1.7V)/50

Ω] * 1.7V = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW

V

OUT

V

CCO

V

Q1

RL

50

Ω