ADP1043A datasheet(14/72 Pages) AD

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ADP1043A

Rev. 0 | Page 14 of 72

DIGITAL FILTER

The loop response of the power supply can be changed using

the internal programmable digital filter. A Type 3 filter archi-

tecture has been implemented. To tailor the loop response to

the specific application, the low frequency gain, zero location,

pole location, and high frequency gain can all be set individually

(see the Digital Filter Programming Registers section). It is

recommended that the Analog Devices software GUI be used to

program the filter. The software GUI displays the filter response

in Bode plot format and can be used to calculate all stability

criteria for the power supply.

From the sensed voltage to the duty cycle, the transfer function

of the filter in z-domain is as follows:

⎟

⎠

⎞

⎜

⎝

⎛

−

⎟

⎠

⎞

⎜

⎝

⎛

−

H(z)

202

(1)

where:

= filter_pole_register_value/256.

= filter_zero_register_value/256.

= high_frequency_gain_register_value.

= low_frequency_gain_register_value.

= 1 when 48.8 kHz ≤ fSW < 97.7 kHz.

= 2 when 97.7 kHz ≤ fSW < 195.3 kHz.

= 4 when 195.3 kHz ≤ fSW < 390.6 kHz.

= 8 when 390.6 kHz ≤ fSW.

To go from z-domain to s-domain, plug the following equation

into the H(z) equation:

z(s)

−

where fSW is the switching frequency.

The digital filter introduces an extra phase delay element into

the control loop. The digital filter circuit sends the duty cycle

information to the PWM circuit at the beginning of each switch-

ing cycle (unlike an analog controller, which makes decisions on

the duty cycle information continuously). Therefore, the extra

phase delay for phase margin, Φ, introduced by the filter block is

= 180 × (fC/fSW)

where:

is the crossover frequency.

fSW

is the switching frequency.

At one tenth of the switching frequency, the phase delay is 18°.

The GUI incorporates this phase delay into its calculations.

Two sets of registers allow for two distinct filter responses. The

main filter, called the normal mode filter, is controlled by

programming Register 0x60 to Register 0x63. The other filter,

called the light load mode filter, is controlled by programming

load mode filter only when the modulation is below the load

current threshold (programmed through Register 0x3B).

The Analog Devices software GUI allows the user to program

the light load mode filter in the same manner as the normal

mode filter. It is recommended that the GUI be used for this

purpose.

In addition, during the soft start process, a different set of

digital filters is used. The soft start filter value for a, b, and c in

Equation 1 is 0, and the d value is programmed through the soft

start filter gain setting (Register 0x5F[1:0]).

PWM AND SYNC RECT OUTPUTS (OUTA, OUTB,

OUTC, OUTD, OUTAUX, SR1, SR2)

The PWM and SR outputs are used for control of the primary

side drivers and the synchronous rectifier drivers. These outputs

can be used for several control topologies, including full-bridge,

phase-shifted ZVS, and interleaved two switch forward converter

configurations. Delays between rising and falling edges can be

individually programmed. Special care must be taken to avoid

shoot-through and cross-conduction. It is recommended that

the Analog Devices software GUI be used to program these

outputs. Figure 14 shows an example configuration to drive a

full-bridge, phase shift topology with synchronous rectification.

OUTA

OUTB

OUTC

OUTD

SR1

SR2

DRIVER

ADuM1410

DRIVER

VIN

OUTA

OUTC

OUTB

OUTD

Figure 14. PWM Pin Assignment

The PWM and SR outputs all work together. Therefore, when

reprogramming more than one of these outputs, it is important to

first update all the registers, and then latch the information into

the ADP1043A at one time. During reprogramming, the outputs

are temporarily disabled. A special instruction is sent to the

ADP1043A to ensure that new timing information is programmed

simultaneously. This is done by setting Register 0x5D[0] to 1. It is

recommended that PWM outputs be disabled when not in use.

OUTAUX is an additional PWM output pin; OUTAUX allows

an extra PWM signal to be generated at a different frequency

from the other six PWM outputs. This signal can be used to

drive an extra power converter stage, such as a buck controller

located in front of a full-bridge converter. OUTAUX can also be

used as a clock reference signal.

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