SMB110 datasheet(21/34 Pages) SUMMIT

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SMB110

Preliminary Information

Summit Microelectronics, Inc

2099 2.3 3/1/2005

APPLICATIONS INFORMATION (CONTINUED)

MANUAL MODE

The SMB110 also provides a manual power-on mode in

which each channel may be enabled individually

irrespective of the state of other channels. In this mode,

the enable has complete control over the channel, and

all sequencing is ignored. In Manual mode channels will

not be disabled in the event of a fault.

POWER OFF OPTIONS

FORCE-SHUTDOWN

When a battery fault occurs, a UV or OV is detected on

any PWM channel, or an I

2C force-shutdown command

is issued, all channels will be immediately disabled.

SEQUENCE TERMINATION TIMER

At the beginning of each sequence position, an internal

programmable timer will begin to time out. When this

timer has expired, the SMB110 will automatically

perform a force-shutdown operation. This timer is user

programmable

with

programmable

sequence

termination period (tPST) of 50,100,200 ms; this function

can also be disabled.

POWER OFF SEQUENCING

The SMB110 has a power-off sequencing operation.

During a power off operation the supplies will be

powered off in the reverse order they where powered

on in. During the power off sequencing, all enables are

ignored.

When a power-off command is issued the SMB110 will

set the sequence position counter to the last sequence

position and disable that channel without soft-start

control; once off, the power off delay for the channel(s)

in the next to last sequence position will begin to

timeout, after which that channel(s) will be disabled.

This process will continue until all channels have been

disabled and are off. The programmable power-off

sequence timeout period (tDPOFF) can be set to 1.5,

12.5, 25, or 50 ms.

If a channel fails to turn off within the sequence

termination period, the sequence termination timer will

initiate a force shutdown, if enabled.

MONITORING

The SMB110 monitors all 4 PWM outputs for under-

voltage (UV) and over-voltage (OV) faults. The

monitored levels are user programmable, and may be

set at 5,10, 15, and 20 percent of the nominal output

voltage.

Each output possesses a glitch filter to ensure that

short violations in the UV or OV settings will not result

in a fault-triggered action. All glitch filters on the

SMB110 are user programmable and may be set to

either 0 or 8 µs.

In the event that one or more channels violate their

respective UV/OV setting for a period exceeding that

specified by the glitch filter, all channels (not set to

Manual mode) can optionally be powered off and-or,

the healthy pin can be triggered. The programmable

power off conditions that may result from a threshold

violation include the immediate power off all supplies

(force-shutdown) or the sequence of all supplies off.

Monitoring is accomplished by a comparator-based

approach, in which a programmable voltage reference

is compared against the monitored signal. Each

channel possesses a dedicated reference voltage

generated by a programmable level shifting digital to

analog converter. Each of which can be set from 0-1.0

volts in 4mV increments.

BATTERY MONITORING

The battery voltage is monitored for two user

programmable UV settings via the VBATT pin

The SMB110 contains two user programmable voltage-

monitoring levels, UV1 and UV2. Battery voltage, like

all monitored voltages, is compared against a user

programmable voltage set internally by a digital to

analog converter.

Once the voltage on the VBATT pin has fallen below

either of the programmable under voltage set points the

SMB110 can be programmed to respond in one of

three ways, it can perform: a power-off operation, a

force-shutdown operation, or take no action. When

programmed to perform a power-off or force-shutdown

operation the SMB110 can optionally be programmed

to latch the outputs off until an I

2C power-on command

is issued or immediately restart once the UV condition

has been removed.

OUTPUT VOLTAGE

The PWM output voltages are set by a resistor divider

from the output to the COMP1 node; see Figure 6. For

the buck channels (Ch[2:3]), the voltage divider is

internal to the part and programmable. The resistor

divider may be set by adjusting a 100 kΩ resistor string

with 8 taps from R1 = 20-90 kΩ. For the boost output

(Ch1), the resistor divider is external and any

appropriate value of R1 an R2 can be chosen. The

reference voltage that sets the output is user

programmable, and may be set anywhere from 0-1.0V

in 4 mV increments for channels 1 to 3, channel 0 is

fixed at 1.0V. The Channel 0 inverting output is set by

the external resistor divider and the VREF_OUT

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