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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AS4C4M4DG-7/XT датащи(PDF) 6 Page - Austin Semiconductor |
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AS4C4M4DG-7/XT датащи(HTML) 6 Page - Austin Semiconductor |
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6 / 19 page  16 Me 16 Me 16 Me 16 Me 16 Meg FPM DRAM g FPM DRAM g FPM DRAM g FPM DRAM g FPM DRAM AS4C4M4 AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice. 6 AS4C4M4 Rev. 1.1 06/05 Austin Semiconductor, Inc. TEST MODE CYCLE11 MIN MAX MIN MAX tRC Random read or write cycle time 115 135 ns tRWC Read-modify-write cycle time 160 180 ns tRAC Access time from RAS\ 65 70 ns 3, 4, 10, 12 tCAC Access time from CAS\ 20 22 ns 3, 4, 5, 12 tAA Access time from column address 35 38 ns 3, 10 ,12 tRAS RAS\ pulse width 65 10K 75 10K ns tCAS CAS\ pulse width 20 10K 25 10K ns tRSH RAS\ hold time 20 22 ns tCSH CAS\ hold time 65 70 ns tRAL Column address to RAS\ lead time 35 40 ns tCWD CAS\ to W\ delay time 45 48 ns 7 tRWD RAS\ to W\ delay time 90 100 ns 7 tAWD Column address to W\ delay time 60 70 ns 7 tCPWD CAS\ precharge to W\ delay time 65 70 ns tPC Fast Page cycle time 45 50 ns tPRWC Fast Page read-modify-write time 90 100 ns tRASP RAS\ pulse width (Fast Page Cycle) 65 100K 75 100K ns tCPA Access time from CAS\ precharge 40 45 ns 3 tOEA OE\ access time 20 22 ns tOED OE\ to data delay 20 22 ns tOEH OE\ command hold time 20 22 ns UNITS NOTES SYMBOL PARAMETER -60 -70 NOTES: 1. An initial pause of 200us is required after power-up followed by an 8 RAS\-only refresh or CAS\-before-RAS\ refresh cycles before proper device operation is achieved. 2. V IH(MIN) and VIL(MAX) are reference levels for measuring timing of input signals. Transition times are measured between V IH(MIN) and VIL(MAX) and are assumed to be 5ns for all inputs. 3. Measured with a load equivalent to 2 TTL loads and 100pF. 4. Operation within the t RCD(MAX) limit insures that tRAC(MAX) and be met. tRCD(MAX) is specified as a reference point only. If t RCD is greater than the specified tRCD(MAX) limit, then access time is controlled exclusively by tCAC. 5. Assumes that t RCD > tRCD(MAX). 6. t OFF(MIN) and tOEZ(MAX) define the time at which the output achieves the open circuit condition and are not referenced VOH or V OL. 7. t WCS, tRWD, tCWD and tAWD are non restrictive operating parameters. They are included in the data sheet as electrical character- istics only. If t WCS > tWCS(MIN), the cycle is an early write cycle and the data output will remain high impedance for the duration of the cycle. If t CWD > tCWD(MIN), tRWD > tRWD(MIN) and tAWD > tAWD(MIN), then the cycle is a read-modify-write cycle and the data output will contain the data read from the selected address. If neither of the above conditions is satisfied, the condition of the data out is indeterminate. (Continued on page 7) |
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