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TPS65192 датащи(PDF) 3 Page - Texas Instruments

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номер детали TPS65192
подробное описание детали  9-Channel Level Shifter With Gate Voltage Shaping and Discharge Functions
PDF  25 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TPS65192 датащи(HTML) 3 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
TPS65192
www.ti.com ....................................................................................................................................................................................................... SLVS962 – JULY 2009
VGH1 = VGH2 = 30V; VGL = –7 V; TA = –40°C to 85°C; typical values are at 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
IGH1
VGH1 Supply current
IN1 to IN7 = GND; VSENSE = 0V
0.35
3
mA
IGH2
VGH2 Supply current
IN8 and IN9 = GND; VSENSE =0V
0.012
1
mA
IGL
VGL Supply current
IN1 to IN9 = GND; VSENSE = 0V
0.144
4
mA
VUVLO
Undervoltage lockout threshold
VGH1 rising
10.5
13.5
V
VHYS
Undervoltage lockout hysteresis
VGH1 falling
450
mV
LEVEL SHIFTERS
Continuous; OUT1 to OUT7
±15
mA
Peak; OUT1 to OUT7
±300
±650
IOUTX
Output current
Continuous; OUT8 and OUT9, DISCHARGE
±15
mA
Peak; OUT8 an OUT9, DISCHARGE
±150
±250
IN1 to IN9 = GND
±1
IINX
Input current
µA
IN1 to IN9 = 3.3 V
±1
VIH
High level input voltage
IN1 to IN9
2.0
V
VIL
Low level input voltage
IN1 to IN9
0.5
V
OUT1 to OUT7; ILOAD = 10 mA
0.12
0.4
VDROPH
Output voltage drop high
V
OUT8 and OUT9, DISCHARGE; ILOAD = 10 mA
0.36
1.0
OUT1 to OUT7; ILOAD = –10 mA
0.07
0.3
VDROPL
Output voltage drop low
V
OUT8 and OUT9, DISCHARGE; ILOAD = –10 mA
0.17
1.0
OUT1 to OUT7; CLOAD = 4.7 nF
(1)
275
520
tR
Rise time
ns
OUT8 and OUT9; CLOAD = 4.7 nF
(1)
761
1000
OUT1 to OUT7; CLOAD = 4.7nF
(1)
220
370
tF
Fall time
ns
OUT8 and OUT9; CLOAD = 4.7 nF
(1)
526
850
tPH
Rising edge, CL = 150 pF
60
Propagation delay
ns
tPL
Falling edge, CL = 150 pF
60
GATE VOLTAGE SHAPING
Propagation delay – gate voltage
tPH
FLK falling
100
ns
shaping enabled
Time active IN signals must be stable before falling
tSU
Set-up time
70
ns
edge of FLK
Resistance between OUT and RE
rDS(on)
70
100
pins
ILEAK
Leakage current from RE pin
±10
µA
DISCHARGE
VSENSE
Discharge voltage sense threshold
VSENSE falling
1.275
1.5
1.725
V
Discharge voltage sense input
ISENSE
VSENSE = 2V
±1
µA
current
VHYS
Discharge voltage sense hysteresis
VSENSE rising
40
mV
(1)
Rise and fall times are measured between 10% and 90% of the waveform’s amplitude.
Copyright © 2009, Texas Instruments Incorporated
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